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References
Kung, S.-Y.: VLSI Processor Arrays (Prentice-Hall Int., 1988).
Montgomery, P. L.: Modular multiplication without trial division. Mathematics of Computations 44 (1985) 519–521
Walter, C. D.: Systolic Modular Multiplication. IEEE Trans. on Comput. 42 (1993) 376–378
Sauerbrey, J.: A Modular Exponentiation Unit Based on Systolic Arrays. A USCRYPT'93 505–516
Eldridge, S. E.: A faster modular multiplication algorithm. Intern. J. Computer Math. 40 (1991) 63–68
Eldridge, S. E., Walter, C. D.: Hardware implementation of Montgomery's modular multiplication algorithm. IEEE Trans. on Comput., 42 (1993) 693–699
Likhoded, N., Sobolevskii, P., Tiountchik, A.: Design of systolic arrays for iterative algorithms: eigenvalue computations. In: Proc. Int. Conf. on Parallel Computing Technologies-PaCT-91, (World Scientific, Singapore, etc., 1991) 129–138
Tiountchik, A.: Generalized approach to the design of VLSI array processors. In: Proc. Int. Workshop on Parallel Processing by Cellular Automata and Arrays-Parcella'96, (Akademie Verlag, Berlin, 1996) 77–84
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© 1997 Springer-Verlag Berlin Heidelberg
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Tiountchik, A.A. (1997). Systolic modular exponentiation. In: Malyshkin, V. (eds) Parallel Computing Technologies. PaCT 1997. Lecture Notes in Computer Science, vol 1277. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63371-5_49
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DOI: https://doi.org/10.1007/3-540-63371-5_49
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