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Performance evaluation of gang scheduling for parallel and distributed multiprogramming

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Book cover Job Scheduling Strategies for Parallel Processing (JSSPP 1997)

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Abstract

In this paper we explore the performance of various aspects of gang scheduling designs. We developed an event-driven simulator of a vanilla gang scheduler that relies on the Distributed Hierarchical Control (DHC) structure. We also developed three variations of the vanilla gang scheduler that rely on a push-down heuristic and on two job-migration schemes to decrease response times by reducing processor idle time. We evaluated the gang schedulers on a compiled, one-month long history of jobs from the Cornell Theory Center that was scheduled by EASY-LL, a particular version of LoadLeveler with backfilling. Our results demonstrate the significant performance improvements that can be achieved with gang scheduling. They also show the performance impact of various aspects in the design of gang schedulers. We identify and discuss the potential benefits of several approaches for addressing a number of gang scheduling issues that, under certain workload conditions, become important in practice. Our techniques include heuristics for mapping jobs to processors and for choosing time quanta, block paging for reducing memory overheads, and the allocation of multiple time-slices to smaller jobs per timeplexing cycle.

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Dror G. Feitelson Larry Rudolph

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© 1997 Springer-Verlag Berlin Heidelberg

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Wang, F., Papaefthymiou, M., Squillante, M. (1997). Performance evaluation of gang scheduling for parallel and distributed multiprogramming. In: Feitelson, D.G., Rudolph, L. (eds) Job Scheduling Strategies for Parallel Processing. JSSPP 1997. Lecture Notes in Computer Science, vol 1291. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63574-2_26

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  • DOI: https://doi.org/10.1007/3-540-63574-2_26

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