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Compiler-controlled multithreading for lenient parallel languages

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Book cover Functional Programming Languages and Computer Architecture (FPCA 1991)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 523))

Abstract

Tolerance to communication latency and inexpensive synchronization are critical for general-purpose computing on large multiprocessors. Fast dynamic scheduling is required for powerful non-strict parallel languages. However, machines that support rapid switching between multiple execution threads remain a design challenge. This paper explores how multithreaded execution can be addressed as a compilation problem, to achieve switching rates approaching what hardware mechanisms might provide.

Compiler-controlled multithreading is examined through compilation of a lenient parallel language, Id90, for a threaded abstract machine, TAM. A key feature of TAM is that synchronization is explicit and occurs only at the start of a thread, so that a simple cost model can be applied. A scheduling hierarchy allows the compiler to schedule logically related threads closely together in time and to use registers across threads. Remote communication is via message sends and split-phase memory accesses. Messages and memory replies are received by compiler-generated message handlers which rapidly integrate these events with thread scheduling.

To compile Id90 for TAM, we employ a new parallel intermediate form, dual-graphs, with distinct control and data arcs. This provides a clean framework for partitioning the program into threads, scheduling threads, and managing registers under asynchronous execution. The compilation process is described and preliminary measurements of its effectiveness are discussed. Dynamic execution measurements are obtained via a second compilation step, which translates TAM into native code for existing machines with instrumentation incorporated. These measurements show that the cost of compiler-controlled multithreading is within a small factor of the cost of control flow in sequential languages.

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Authors and Affiliations

  1. Computer Science Division, University of California, Berkeley

    Klaus Erik Schauser, David E. Culler & Thorsten von Eicken

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  1. Klaus Erik Schauser
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  2. David E. Culler
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  3. Thorsten von Eicken
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John Hughes

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© 1991 Springer-Verlag Berlin Heidelberg

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Schauser, K.E., Culler, D.E., von Eicken, T. (1991). Compiler-controlled multithreading for lenient parallel languages. In: Hughes, J. (eds) Functional Programming Languages and Computer Architecture. FPCA 1991. Lecture Notes in Computer Science, vol 523. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3540543961_4

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  • DOI: https://doi.org/10.1007/3540543961_4

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-54396-1

  • Online ISBN: 978-3-540-47599-6

  • eBook Packages: Springer Book Archive

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