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Transactional Memories

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Synonyms

Locks; Monitors; Multiprocessor synchronization

Introduction

Transactional memory (TM) is an approach to structuring concurrent programs that seeks to provide better scalability and ease-of-use than conventional approaches based on locks and conditions. The term is commonly used to refer to ideas that range from programming language constructs to hardware architecture. This entry will survey how transactional memory affects each of these domains.

The major chip manufacturers have, for the time being, given up trying to make processors run faster. Moore’s law has not been repealed: Each year, more and more transistors fit into the same space, but their clock speed cannot be increased without overheating. Instead, attention has turned toward chip multiprocessing(CMP), in which multiple computing cores are included on each processor chip. In the medium term, advances in technology will provide increased parallelism, but not increased single-thread performance. As a result,...

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Bibliography

  1. Hoare CAR (1974) Monitors: an operating system structuring concept. Commun ACM 17(10):549–557

    MATH  Google Scholar 

  2. Herlihy MP, Wing JM (1990) Linearizability: a correctness condition for concurrent objects. ACM T Progr Lang Sys 12(3):463–492

    Google Scholar 

  3. Michael MM, Scott ML (1996) Simple, fast, and practical non-blocking and blocking concurrent queue algorithms. In: PODC, Philadelphia. ACM, New York, pp 267–275

    Google Scholar 

  4. Harris T, Marlow S, Peyton-Jones S, Herlihy M (2005) Composable memory transactions. In: PPoPP ’05: Proceedings of the tenth ACM SIGPLAN symposium on principles and practice of parallel programming, Chicago. ACM, New York, pp 48–60

    Google Scholar 

  5. Herlihy M, Moss JEB (May 1993) Transactional memory: architectural support for lock-free data structures. In: International symposium on computer architecture, San Diego

    Google Scholar 

  6. Hickey R (2008) The clojure programming language. In: DLS ’08: Proceedings of the 2008 symposium on dynamic languages, Paphos. ACM, New York, pp 1–1

    Google Scholar 

  7. Microsoft Corporation. Stm.net. http://msdn.microsoft.com/en-us/devlabs/ee334183.aspx

  8. Korland G Deuce STM. http://www.deucestm.org/

  9. S. Microsystems. DSTM2. http://www.sun.com/download/products.xml?id=453fb28e

  10. Intel Corporation. \(\textrm{ C} + +\) STM compiler. http://software.intel.com/en-us/articles/intel-c-stm-compiler-prototype-edition-20/

  11. Rossbach CJ, Hofmann OS, Porter DE, Ramadan HE, Aditya B, Witchel E (2007) TxLinux: using and managing hardware transactional memory in an operating system. In: SOSP ’07: Proceedings of twenty-first ACM SIGOPS symposium on operating systems principles, Stevenson. ACM, New York, pp 87–102

    Google Scholar 

  12. Damron P, Fedorova A, Lev Y, Luchangco V, Moir M, Nussbaum D (2006) Hybrid transactional memory. In: ASPLOS-XII: Proceedings of the 12th international conference on architectural support for programming languages and operating systems, Boston. ACM, New York, pp 336–346

    Google Scholar 

  13. Pankratius V, Adl-Tabatabai A-R, Otto F (Sept 2009) Does transactional memory keep its promises? Results from an empirical study. Technical Report 2009-12, University of Karlsruhe

    Google Scholar 

  14. Rossbach CJ, Hofmann OS, Witchel E (Jun 2009) Is transactional memory programming actually easier? In: Proceedings of the 8th annual workshop on duplicating, deconstructing, and debunking (WDDD), Austin

    Google Scholar 

  15. Rajwar R, Goodman JR (2001) Speculative lock elision: enabling highly concurrent multithreaded execution. In: MICRO 34: Proceedings of the 34th annual ACM/IEEE international symposium on microarchitecture, Austin. IEEE Computer Society, Washington, DC, pp 294–305

    Google Scholar 

  16. Click C (Feb 2009) Experiences with hardware transactional memory. http://blogs.azulsystems.com/cliff/2009/02/and-now-some-hardware-transactional-memory-comments.html

  17. Yen L, Bobba J, Marty MR, Moore KE, Volos H, Hill MD, Swift MM, Wood DA (2007) LogTM-SE: decoupling hardware transactional memory from caches. In: HPCA ’07: Proceedings of the 2007 IEEE 13th international symposium on high performance computer architecture, Phoenix. IEEE Computer Society, Washington, DC, pp 261–272

    Google Scholar 

  18. Blundell C, Devietti J, Lewis EC, Martin M (Jun 2007) Making the fast case common and the uncommon case simple in unbounded transactional memory. In: International symposium on computer architecture, San Diego

    Google Scholar 

  19. Hammond L, Carlstrom BD, Wong V, Hertzberg B, Chen M, Kozyrakis C, Olukotun K (2004) Programming with transactional coherence and consistency (TCC). ACM SIGOPS Oper Syst Rev 38(5):1–13

    Google Scholar 

  20. Rajwar R, Herlihy M, Lai K (Jun 2005) Virtualizing transactional memory. In: International symposium on computer architecture, Madison

    Google Scholar 

  21. Ananian CS, Asanović K, Kuszmaul BC, Leiserson CE, Lie S (Feb 2005) Unbounded transactional memory. In: Proceedings of the 11th international symposium on high-performance computer architecture (HPCA’05), San Franscisco, pp 316–327

    Google Scholar 

  22. Blundell C, Lewis EC, Martin MMK (Jun 2005) Deconstructing transactions: the subtleties of atomicity. In: Fourth annual workshop on duplicating, deconstructing, and debunking, Wisconsin

    Google Scholar 

  23. Larus J, Rajwar R (2007) Transactional memory (Synthesis lectures on computer architecture). Morgan & Claypool, San Rafael

    Google Scholar 

  24. Menon V, Balensiefer S, Shpeisman T, Adl-Tabatabai A-R, Hudson RL, Saha B, Welc A (2008) Single global lock semantics in a weakly atomic STM. SIGPLAN Notices 43(5):15–26

    Google Scholar 

  25. Guerraoui R, Kapalka M (2008) On the correctness of transactional memory. In: PPoPP ’08: Proceedings of the 13th ACM SIGPLAN symposium on principles and practice of parallel programming, Salt Lake City. ACM, New York, pp 175–184

    Google Scholar 

  26. Welc A, Saha B, Adl-Tabatabai A-R (2008) Irrevocable transactions and their applications. In: SPAA ’08: Proceedings of the twentieth annual symposium on parallelism in algorithms and architectures, Munich. ACM, New York, pp 285–296

    Google Scholar 

  27. Moravan MJ, Bobba J, Moore KE, Yen L, Hill MD, Liblit B, Swift MM, Wood DA (2006) Supporting nested transactional memory in logTM. SIGPLAN Notices 41(11):359–370

    Google Scholar 

  28. Herlihy M, Koskinen E (2008) Transactional boosting: a methodology for highly-concurrent transactional objects. In: PPoPP ’08: Proceedings of the 13th ACM SIGPLAN symposium on principles and practice of parallel programming, Salt Lake City. ACM, New York, pp 207–216

    Google Scholar 

  29. Herlihy M, Luchangco V, Moir M, Scherer W (Jul 2003) Software transactional memory for dynamic-sized data structures. In: Symposium on principles of distributed computing, Boston

    Google Scholar 

  30. Guerraoui R, Herlihy M, Pochon B (2005) Toward a theory of transactional contention managers. In: PODC ’05: Proceedings of the twenty-fourth annual ACM symposium on principles of distributed computing, Las Vegas. ACM, New York, pp 258–264

    Google Scholar 

  31. Scherer WN III, Scott ML (Jul 2004) Contention management in dynamic software transactional memory. In: PODC workshop on concurrency and synchronization in java programs, St. John’s

    Google Scholar 

  32. Attiya H, Epstein L, Shachnai H, Tamir T (2006) Transactional contention management as a non-clairvoyant scheduling problem. In: PODC ’06: Proceedings of the twenty-fifth annual ACM symposium on principles of distributed computing, Denver. ACM, New York, pp 308–315

    Google Scholar 

  33. Dice D, Shalev O, Shavit N (2006) Transactional locking II. In: Proceedings of the 20th international symposium on distributed computing, Stockholm

    Google Scholar 

  34. Lev Y, Luchangco V, Marathe V, Moir M, Nussbaum D, Olszewski M (2009) Anatomy of a scalable software transactional memory. In: TRANSACT 2009, Raleigh

    Google Scholar 

  35. Spear MF, Marathe VJ, Dalessandro L, Scott ML (2007) Privatization techniques for software transactional memory. In: PODC ’07: Proceedings of the twenty-sixth annual ACM symposium on principles of distributed computing, Portland. ACM, New York, pp 338–339

    Google Scholar 

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Herlihy, M. (2011). Transactional Memories. In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_122

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