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Bibliography
Bokhari SH (1981) On the mapping problem. IEEE Trans Comput 30(3):207–214
Kasahara H, Narita S (1984) Practical multiprocessor scheduling algorithms for efficient parallel processing. IEEE Trans Comput 33:1023–1029
Arunkumar S, Chockalingam T (1992) Randomized heuristics for the mapping problem. Int J High Speed Comput (IJHSC) 4(4):289–300
Fitch BG, Rayshubskiy A, Eleftheriou M, Ward TJC, Giampapa M, Pitman MC (2006) Blue matter: approaching the limits of concurrency for classical molecular dynamics. In: SC’06: Proceedings of the 2006 ACM/IEEE conference on Supercomputing, Tampa, ACM Press, New York, 11–17 Nov 2006
Gygi F, Draeger EW, Schulz M, Supinski BRD, Gunnels JA, Austel V, Sexton JC, Franchetti F, Kral S, Ueberhuber C, Lorenz J (2006) Large-scale electronic structure calculations of high-Z metals on the blue gene/L platform. In: SC’06: Proceedings of the 2006 ACM/IEEE conference on Supercomputing, ACM Press, New York
Bhatelé A, Bohm E, Kalé LV (2011) Optimizing communication for Charm++applications by reducing network contention. Concurr Comput 23(2):211–222
Lee S-Y, Aggarwal JK (1987) A mapping strategy for parallel processing. IEEE Trans Comput 36(4):433–442
Berman F, Snyder L (1987) On mapping parallel algorithms into parallel architectures. J Parallel Distrib Comput 4(5):439–458
Ercal F, Ramanujam J, Sadayappan P (1988) Task allocation onto a hypercube by recursive mincut bipartitioning. In: Proceedings of the 3rd conference on Hypercube concurrent computers and applications, ACM Press, New York, pp 210–221
Agarwal T, Sharma A, Kalé LV (2006) Topology-aware task mapping for reducing communication contention on large parallel machines, In: Proceedings of IEEE International Parallel and Distributed Processing Symposium 2006, Rhodes Island, 25–29 Apr 2006. IEEE, Piscataway
Yu H, Chung I-H, Moreira J (2006) Topology mapping for blue gene/L supercomputer. In: SC’06: Proceedings of the 2006 ACM/IEEE conference on Supercomputing, Tampa, 11–17 Nov 2006. ACM, New York, p 116
Bhatele A (2010) Automating topology aware mapping for supercomputers. Ph.D. thesis, Dept. of Computer Science, University of Illinois. http://hdl.handle.net/2142/16578 (August 2010)
Kernighan BW, Lin S (1970) An efficient heuristic procedure for partitioning graphs. Bell Syst Tech J 49(1):291–307
Bollinger SW, Midkiff SF (1988) Processor and link assignment in multicomputers using simulated annealing. In: 1988 ICPP, vol 1, Aug 1988, pp 1–7
Bhanot G, Gara A, Heidelberger P, Lawless E, Sexton JC, Walkup R (2005) Optimizing task layout on the blue gene/L supercomputer. IBM J Res Dev 49(2/3):489–500
Bhatele A, Gupta G, Kale LV, Chung I-H (2010) Automated mapping of regular communication graphs on mesh interconnects. In: Proceedings of International Conference on High Performance Computing & Simulation (HiPCS) 2010, Caen, 28 June–2 July 2010. IEEE, Piscataway
Mansour N, Ponnusamy R, Choudhary A, Fox GC (1993) Graph contraction for physical optimization methods: a quality-cost tradeoff for mapping data on parallel computers. In: ICS’93: Proceedings of the 7th International Conference on Supercomputing, Tokyo, 19–23 July 1993. ACM, New York, pp 1–10
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Bhatele, A. (2011). Topology Aware Task Mapping. In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_275
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DOI: https://doi.org/10.1007/978-0-387-09766-4_275
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