Abstract
This paper describes an nMOS integrated circuit designed in the late 1970’s that performed the computationally expensive portion of a maze-solving algorithm using a fine-grained parallel processor architecture. The algorithm included continuously variable weights associated with travel through the maze in different directions. The integrated circuit described here directly incorporated those weights as analog parameters affecting inter-processor communication of digital data. The combination of fine-grained parallelism and inter-processor communication controlled by analog weights was unique, and can be viewed as an early example of what might now be called a neural system.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Akers, S., “A Modification of Lee’s Path Connection Algorithm,” IEEE Transactions on Electronic Computers (Short Notes), Vol. EC-16, pp. 97–98, February, 1967.
Carroll, C.R., “A Smart Memory Array Processor for Two Layer Path Finding,” Proceedings of the Second Caltech Conference on Very Large Scale Integration, Caltech Computer Science Department, pp. 165–195, 1981.
Carroll, C.R., “Hybrid Processing,” Ph.D. Thesis, Computer Science Department, California Institute of Technology, 1982.
Lee, C., “An Algorithm for Path Connections and its Applications,” IEEE Transactions on Electronic Computers, Vol. EC-10, pp. 346–365, September, 1961.
Moore, E., “Shortest Path Through a Maze,” Annals of the Computation Laboratory of Harvard University, Vol. 30, Cambridge, MA: Harvard University Press, pp. 285–292, 1959.
Sutherland, I.E., “A Better Mousetrap,” Computer Science Department display file #562, California Institute of Technology, March 8, 1977.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1989 Kluwer Academic Publishers
About this chapter
Cite this chapter
Carroll, C.R. (1989). A Neural Processor for Maze Solving. In: Mead, C., Ismail, M. (eds) Analog VLSI Implementation of Neural Systems. The Kluwer International Series in Engineering and Computer Science, vol 80. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1639-8_1
Download citation
DOI: https://doi.org/10.1007/978-1-4613-1639-8_1
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-8905-0
Online ISBN: 978-1-4613-1639-8
eBook Packages: Springer Book Archive