Abstract
Issues in analog VLSI, such as the use of simple parameterized cells that are highly reconfigurable and input/output compatability, are being molded by the activities in developing hardware implementations of microelectronic neural networks. Analog MOS circuit modules, such as integrators, summers, and multipliers can be configured in a neural network architecture to build feedback/feedforward neural networks and/or the equivalent of adaptive, state-space signal processors. The methods of adaptation can be compared by evaluating a criterion or energy function which drives the adaptation process.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
C. Mead, Analog VLSI and Neural Systems, Reading, Mass., Addison-Wesley, 1989.
M. Ismail and J. Franka, Introduction to Analog VLSI Design Automation, Kluwer Academic Publishers, Boston, 1989.
M.R. Haskard and I.C. May, Analog VLSI Design: NMOS and CMOS, Prentice-Hall, New York, 1988.
N. El-Leithy and R.W. Newcomb, Special Issue on Neural Networks. IEEE Transactions on Circuit and Systems, May 1989.
Also, S. Bibyk and M. Ismail, Analog Signal Processing for Neural Microelectronics, Special Session, Proc. IEEE ISCAS, May, 1989.
E. Habekotte et al. “State-of-the-Art in the Analog CMOS Circuit Design” Proc. IEEE, Vol. 75, pp. 816–828, June 1987.
Y. Tsividis, “Analog MOS Integrated Circuits: Certain New Ideas, Trends, and Obstacles”, IEEE J. Solid-State Circuits, Vol. SC-22, pp. 317–321, June 1987.
M. Ismail, “Continuous-time Analog Design for MOS VLSI” State-of-the-Art Review invited paper, Proc. of the 30th Midwest Symp. on Circuits and Systems, pp. 707–711, Elsevier Science Publishing Co., 1987.
P.R. Gray, B. Wooley, and R.W. Broderson, Analog MOS Integrated Circuits IEEE Press book, New York, 1989.
P.E. Allen, “CAD for Analog VLSI”, IEEE CAS Distinguished Lecturer Program, April 24, 1989.
M. Ismail, “Reconfigurability, Versatility and Modularity in analog IC Design,” presented at the Semiconductor Research Corporation (SRC) Workshop on Analog Design Automation, December 2nd, 1988.
J.L. Hilbert, SRC Private Communication, December, 1988.
L.R. Carley and R.A. Rutenbar. “How to Automate Analog IC Designs,” IEEE Spectrum, pp. 26–30, August 1988.
H.Y. Koh, C.H. Sequin, and P.R. Gray, “Auto Synthesis of Operational Amplifiers Based on Analytic Circuit Modes”, Proc. IEEE ICCAD, pp. 502–505, November 1987.
J.J. Hopfield, “Neurons with graded response have collective computational properties like those of two state neurons,” Proc. Natl. Acad. Sci.,USA, vol. 81, pp. 3088–3092, May 1984.
B. Widrow and S. Stearns, Adaptive Signal Processing, Englewood Cliffs, NJ, Prentice Hall, 1985.
T. Kohonen, Self-Organization and Associative Memory, Second Edition, 1987.
S. Bibyk and K. Adkins, “Neural Nets and Emergent Adaptive Signal Processing,” Proc. of IEEE Int. Symp. Circuits and Systems, May 1989, pp. 1203–1206.
D.E. Rummelhart, J.L. McClelland, and the PDP Research Group, Parallel Distributed Processing, The MIT Press, vol. 1, chp. 8, 1986.
D. Johns, W. Snelgrove, and A. Sedra, “Continuous-Time Analog Adaptive Recursive Filters,” Proc. of IEEE Int. Symp. Circuits and Systems, May 1989, pp. 667–670.
V. Saksena, J. O’Reilly, and P. Kokotovic, “Singular Perturbations and Time-scale Methods in Control Theory: Survey 1976–1983,” Automatica, vol. 20, pp. 273–293, May 1984.
T.L. Brooks and P.M. VanPeteghem, “Simultaneous Tuning and Signal Processing in Integrated Continuous Time Filters: The Correlated Tuning Loop,” Proc. of IEEE Int. Symp. Circuits and Systems, May 1989, pp. 651–654.
M. Ismail, “Four Transistor Continuous-Time MOS Transconductor,” Electronics Letters, Vol. 23, No. 20, pp. 1099–1100, September 1987.
M. Ismail, S. Smith and R. Beale, “A New MOSFET-C Universal Filter Structure for VLSI,” IEEE J. Solid-State Circuits, Vol. 23, pp. 183–194, February 1988.
N. Khachab and M. Ismail, “Novel Continuous-Time All-MOS Four-Quadrant Multipliers”, Proc IEEE ISC AS, pp. 762–765, May 1987.
F. Salam, N. Khachab, M. Ismail, and Y. Wang, “An Analog MOS Implementation of the Synaptic Weights for Feedback Neural Nets,” Proc. IEEE ISCAS, pp. 1223–1225, May 1989.
N. Khachab and M. Ismail, “An Analog MOS VLSI Implementation of Hopfield-like Neural Networks,” to appear.
R. Shimabukuro, I. Lagnado, and P. Shoemaker, “A Dual Polarity Nonvolatile Analog Memory for Use in Adaptive Neural Networks,” Silicon Nitride and Silicon Dioxide Thin Insulating Films, ed. S. Bibyk et al., Proc. of the Electrochemical Soc., vol 89–7, pp 157–165.
J. Sage, and R. Withers, “Analog Nonvolatile Memory for Neural Network Implementations,” Silicon Nitride and Silicon Dioxide Thin Insulating Films, ed. S. Bibyk et al., Proc. of the Electrochemical Soc., vol 89–7, pp 157–165.
L. Glasser, “A UV Write-Enabled PROM,” 1985 Chapel Hill Conference on VLSI, pp. 61–66.
S. Bibyk, H. Wang, P. Borton, “Analyzing Hot-Carrier Effects on Cold CMOS Devices,” IEEE Trans. Elec. Dev., vol. ED-34, pp. 83–88, Jan. 1987.
T. Borgstrom and S. Bibyk, “A Neural Network Circuit Utilizing Programmable Threshold Voltage Devices,” Proc. of IEEE Int. Symp. Circuits and Systems, May 1989, pp. 1227–1230.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1989 Kluwer Academic Publishers
About this chapter
Cite this chapter
Bibyk, S., Ismail, M. (1989). Issues in Analog VLSI and MOS Techniques for Neural Computing. In: Mead, C., Ismail, M. (eds) Analog VLSI Implementation of Neural Systems. The Kluwer International Series in Engineering and Computer Science, vol 80. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1639-8_5
Download citation
DOI: https://doi.org/10.1007/978-1-4613-1639-8_5
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4612-8905-0
Online ISBN: 978-1-4613-1639-8
eBook Packages: Springer Book Archive