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An Architecture for Generalized Synchronization and Fast Switching

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Multithreaded Computer Architecture: A Summary of the State of the ART

Part of the book series: The Springer International Series in Engineering and Computer Science ((SECS,volume 281))

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Abstract

This chapter presents a comprehensive description of an architecture designed with two principal goals in mind. First, the architecture provides a large synchronization space that efficiently implements a variety of synchronizations that are commonly used. Second, it provides fast switching between concurrent computations. The description includes the basic model of a multi-threaded architecture, examples of programming paradigms, synchronization primitives, and hardware implementing critical components of the architecture. Also included are extensions to the architecture to support a priority-driven paradigm for building predictable real-time systems.

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References

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Author information

Author notes

  1. Kei Hiraki

    Present address: University of Tokyo, Japan

  2. Robert A. Iannucci

    Present address: Exa Corporation, Cambridge, USA

  3. Ragunathan Rajkumar

    Present address: Software Engineering Institute, Carnegie Mellon University, USA

Authors and Affiliations

  1. IBM Thomas J. Watson Research Center, Yorktown Heights, P.O. Box 218, NY, 10598, USA

    Kattamuri Ekanadham & Steve Gregor

Authors
  1. Kattamuri Ekanadham
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  2. Steve Gregor
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  3. Kei Hiraki
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  4. Robert A. Iannucci
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  5. Ragunathan Rajkumar
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Editor information

Editors and Affiliations

  1. Exa Corporation, Cambridge, Massachusetts, USA

    Robert A. Iannucci

  2. McGill University, Montreal, Quebec, Canada

    Guang R. Gao

  3. Digital Equipment Corporation, Cambridge, Massachusetts, USA

    Robert H. Halstead Jr.

  4. Tera Computer Company, Seattle, Washington, USA

    Burton Smith

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© 1994 Springer Science+Business Media New York

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Ekanadham, K., Gregor, S., Hiraki, K., Iannucci, R.A., Rajkumar, R. (1994). An Architecture for Generalized Synchronization and Fast Switching. In: Iannucci, R.A., Gao, G.R., Halstead, R.H., Smith, B. (eds) Multithreaded Computer Architecture: A Summary of the State of the ART. The Springer International Series in Engineering and Computer Science, vol 281. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2698-8_12

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  • DOI: https://doi.org/10.1007/978-1-4615-2698-8_12

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6161-9

  • Online ISBN: 978-1-4615-2698-8

  • eBook Packages: Springer Book Archive

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