Years and Authors of Summarized Original Work
1993; Herlihy, Moss
Problem Definition
A transactional memory (TM) is a concurrency control mechanism for executing accesses to memory shared by multiple processes. A transaction, in this context, is a section of code that executes a series of reads and writes to the shared memory as one atomic indivisible unit. As a result, intermediate states of a transaction are hidden from other concurrent transactions, and it is only possible to see either all of the modifications of a transaction or none of them.
The goal of transactional memory is to provide an alternative to lock-based concurrency control. A programmer can replace the use of lock-based critical sections with transactions and rely on the TM system to execute these sections concurrently while preserving their atomicity. During the execution, the TM system tracks the reads and writes to the shared memory by the different transactions and, in this way, is able to detect conflicts:...
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsRecommended Reading
Adl-Tabatabai A, Shpeisman T, Gottschlich J (2012) Draft specification of transactional language constructs for C++. https://sites.google.com/site/tmforcplusplus
Calciu I, Gottschlich J, Shpeisman T, Pokam G, Herlihy M (2014) Invyswell: a hybrid transactional memory for Haswell’s restricted transactional memory. In: International conference on parallel architectures and compilation, PACT ’14, Edmonton, 24–27 Aug 2014, pp 187–200
Dalessandro L, Carouge F, White S, Lev Y, Moir M, Scott ML, Spear MF (2011) Hybrid norec: a case study in the effectiveness of best effort hardware transactional memory. SIGPLAN Not 46(3):39–52
Dalessandro L, Spear MF, Scott ML (2010) Norec: streamlining STM by abolishing ownership records. In: Proceedings of the 15th ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP ’10, Bangalore. ACM, New York, pp 67–78
Damron P, Fedorova A, Lev Y, Luchangco V, Moir M, Nussbaum D (2006) Hybrid transactional memory. SIGPLAN Not 41(11):336–346
Dice D, Shalev O, Shavit N (2006) Transactional locking II. In: Proceedings of the 20th international symposium on distributed computing (DISC 2006), Stockholm, pp 194–208
Felber P, Riegel T, Fetzer C (2006) A lazy snapshot algorithm with eager validation. In: 20th international symposium on distributed computing (DISC), Stockholm, Sept 2006.
Guerraoui R, Kapalka M (2008) On the correctness of transactional memory. In: Proceedings of the 13th ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP ’08, Salt Lake City. ACM, New York, pp 175–184
Herlihy M, Moss E (1993) Transactional memory: architectural support for lock-free data structures. In: Proceedings of the twentieth annual international symposium on computer architecture, San Diego
Kumar S, Chu M, Hughes C, Kundu P, Nguyen A (2006, to appear) Hybrid transactional memory. In: Proceedings of the ACM SIGPLAN symposium on principles and practice of parallel programming, PPoPP 2006, New York
Lev Y, Moir M, Nussbaum D (2007) PhTM: phased transactional memory. In: Workshop on transactional computing (Transact), 2007. research.sun.com/scalable/pubs/TRANSACT2007PhTM.pdf
Matveev A, Shavit N (2013) Reduced hardware transactions: a new approach to hybrid transactional memory. In: 25th ACM symposium on parallelism in algorithms and architectures, SPAA ’13, Montreal, pp 11–22
Matveev A, Shavit N (2015) Reduced hardware norec: a safe and scalable hybrid transactional memory. In: Proceedings of the twentieth international conference on architectural support for programming languages and operating systems, ASPLOS ’15, Istanbul. ACM, New York, pp 59–71
Rajwar R, Goodman J (2001) Speculative lock elision: enabling highly concurrent multithreaded execution. In: Proceedings of the 34th annual international symposium on microarchitecture, MICRO, Austin. ACM/IEEE, pp 294–305
Riegel T, Marlier P, Nowack M, Felber P, Fetzer C (2011) Optimizing hybrid transactional memory: the importance of nonspeculative operations. In: Proceedings of the 23rd ACM symposium on parallelism in algorithms and architectures, SPAA ’11, San Jose. ACM, New York, pp 53–64
Shavit N, Touitou D (1997) Software transactional memory. Distrib Comput 10(2):99–116
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer Science+Business Media New York
About this entry
Cite this entry
Shavit, N., Matveev, A. (2016). Transactional Memory. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2864-4_607
Download citation
DOI: https://doi.org/10.1007/978-1-4939-2864-4_607
Published:
Publisher Name: Springer, New York, NY
Print ISBN: 978-1-4939-2863-7
Online ISBN: 978-1-4939-2864-4
eBook Packages: Computer ScienceReference Module Computer Science and Engineering