Abstract
Though SM4 was originally designed for data security and protection in WLAN, it demonstrates high application value in many other data transmission and protection scenarios. In this paper, we present a novel architecture of XTS-SM4 module design for data storage devices, in which we adopt fully unrolled pipeline to adapt SM4 to high throughput requirement. In addition, efforts have been done to optimize the area of Sbox and control quantity of registers. We have also managed to make the module’s interface as elegant as possible to simplify user’s operation. According to synthesis results with TSMC 28 nm cell library, our implementation scheme has achieved a highest throughput of 33.68 Gbps with an efficiency of 325.12 Mbps/(Kgate). Comparing with other XTS-AES designs in the same technology, our XTS-SM4 scheme gains at least twice better throughput/area efficiency.
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The work is supported by a grant from the National Key Research and Development Program of China (Grant NO. 2016YFB0800500).
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Appendices
A Optimized SM4 Sbox description in Verilog
B Synthesis Report of TSMC 28nm Library
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Zheng, L., Li, C., Liu, Z., Zhang, L., Ma, C. (2018). Implementation of High Throughput XTS-SM4 Module for Data Storage Devices. In: Beyah, R., Chang, B., Li, Y., Zhu, S. (eds) Security and Privacy in Communication Networks. SecureComm 2018. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 255. Springer, Cham. https://doi.org/10.1007/978-3-030-01704-0_15
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DOI: https://doi.org/10.1007/978-3-030-01704-0_15
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