Keywords

1 Introduction

Cascaded transformer multilevel inverter (CT-MLI) topologies are structures composed by multiple stages, each one integrating a power converter and a low frequency transformer. In the majority of known topologies, the inverter stages inputs are connected in parallel to the same DC source and the outputs in serial. CT-MLI can be classified as symmetrical or asymmetrical, depending on the turns ratios of the transformers, i.e., if they are equal or not. The building of the output signal is accomplished by stages commutating in a synchronous way named as switching pattern. According to the number of inverter stages, the turns ratios of the transformers and the switching pattern, the inverter can produce more or fewer output levels which affects directly the quality of the output signal [1,2,3]. Then diagnosis methods are fundamental to predict failures, avoid fault propagation, provide fault tolerant modes or isolate the system [4].

Fault diagnosis in multilevel inverters cannot rely on detection per element or stage because it is required multiple measurements, signal acquisitions, and highly complex algorithms and electronics. Therefore, many algorithms take measurement of output voltage and current and perform fault detection looking for specific anomalies in the operation of the system. Anomalies produced by power semiconductors can be attributed to a permanent state in which the control signal cannot have effect because one or more elements are damaged keeping into short circuit or open circuit. Detection of open-circuit failures is more difficult because short-circuits failures easily enforce the action of fuses and other current protection elements [5, 6]. However, considering that inverter has multiple stages and also that power levels are considerably high, in some cases short-circuit failures cannot be detected. Conventional methods operate continuously reviewing changes in the output or current waveforms that indicate the presence of a fault or using features which are computed for at least a cycle of the signal or, in best cases, involving a sliding window to increase the rapidity of the detection. The indicators mainly used are the normalized DC component or average value, the total harmonic distortion (THD), the RMS value [7,8,9,10].

Thanks to the advancements in artificial intelligence and the interest to apply these methods in diagnosis of power electronics systems, pattern recognition techniques has been also developed for multilevel inverters. Artificial neural networks (ANN) combined with discrete wavelet transform is presented in [11], where feature extraction of energy content and mean during transient is accomplished using Clark’s transform. Classification and localization of faults in an induction motor drive using ANN shows a performance higher than 97.5% in a symmetric multilevel inverter of two stages where input currents are used to extract features [12].

Among the classifiers found in the literature for pattern recognition in multilevel inverters, it can be mentioned the Bayesian classifier called Naive Bayes (NB) [13], the support vector machine classifier (SVM) [14], the multiclass relevance SVM [15], and the k-Nearest Neighbors classifier (K-NN) [16]. The detection accuracy of the above-mentioned methods ranges from 85% to 99%. As a positive impact of the use of the fault detection capability of these techniques [20, 21], the control of the inverters can be complemented with fault tolerant or reconfiguration modes in which the system can temporarily operates when a failure occurs. For instance, in [17] when an inverter stage fails, the rest of the stages changes the switching pattern to obtain an output signal with reduced levels while keeping high quality. In this way, the failed stage is by-passed and the others operate with a different modulation index to compensate for the absence [18]. To potentiate the application of all these techniques in the industry context, relevant aspects are the computational cost in both memory resources and processing time, being the improvement of these features a relevant challenge for future research in this field. However, all the mentioned methods require several sensors, one located at the output of each stage, which is not practical. Therefore, in this paper, a new fault detection method based on pattern recognition is introduced, which requires sensing only the voltage output of the inverter.

The transformer based multilevel inverter in which the method is applied consists of four stages (16 power semiconductor devices, four MOSFETs for stage) and is fed by a single DC source (see more details in [19, 23]).

2 Materials

Multilevel inverters generate an AC output voltage waveform that is built using discrete amplitude steps. As the number of levels in the voltage waveform increases, higher quality is demonstrated because the total harmonic distortion (THD) decreases. A high number of levels (more than 35) may be unnecessary and unachievable, in a practical sense, because a lower amount of levels can comply with international standards which define 5% as the permissible limit level for THD. In this paper, the target inverter topology has four stages in which ratios between stages are defined as 6:7:8:9. With this ratio, the inverter can produce until 35 levels in the output signal (see more details in [19, 23]). The inverter output voltage is given mathematically by the algebraic sum of the stages output voltages.

The studied multilevel inverter uses 16 power semiconductor devices (4 for each H-bridge). Each one can suffer a breakdown that would lead to a permanent short or open circuit state. Furthermore, some failures can affect more than one semiconductor device simultaneously, thus increasing the set of potential fail events. Thereafter, the proposed automatic fault detection algorithm was designed to recognize and localize the malfunctions of the inverter. Figure 1 shows the simulated output inverted signals. Gaussian noise was added with an amplitude of 5 v and an uniform distribution, this value is higher than the noise normally found.

Fig. 1.
figure 1

CT–MLI output voltages, short circuit fail and open circuit fail.

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3 Methods

The 60 Hz AC output voltage taken from the CT–MLI model was employed to construct three signal databases to train and test the machine learning-based algorithms. Each database contains a different number of sample points per signal. The first database, as is observed in Fig. 2a, is composed of 835 uniformly separated samples per cycle. The second one, as illustrated in Fig. 2b, is composed only of the samples taken at the points where there is a voltage change in the signal; it is composed of 120 nonuniformly separated samples per cycle. Finally, the third database (Fig. 2c) was a quarter of the period of the voltage signal sampled only in level change events; resulting in 30 data per cycle at 60 Hz (first quarter of the negative half-cycle was selected).

Fig. 2.
figure 2

The samples acquired (a) using sample time of 1 µs (835 descriptors); (b) every switching event (120 descriptors); (c) every switching event (30 descriptors).

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Therefore, the database was built with 3300 signals for each sample type, used for the development and evaluation of the proposed method see Fig. 3. The first 100 signals were taken in normal operation without fails, the next signals were taken when some stage had a fault in one device H-bridge, with possibilities that device remained in open circuit or short circuit, 100 signals for each device fault in groups of 800 signals for the stage. The target data were chosen as “0” for normal operation, “1” stage 1 fault and so on.

Fig. 3.
figure 3

The database build

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The study used a Apple Macbook Air model A1466 with 4 GB DDR3 of memory, a Intel Core i5 processor @ 1.3 GHz and a Intel HD 1536 MB graphics card. The signal database was acquired in PSIM and developed in Phyton 2.7. The machine learning algorithms were implemented in Phyton 2.7, using the Scikit-learn library.

4 Results

4.1 Parameter Estimation

To train the learning algorithms, 75% of the simulated data were used (2310 samples) for the estimation of the parameters using cross validation. The remaining 25% (990 samples) of the data were used to find the optimal values of each classifier according to the precision, as presented in Table 1.

Table 1. Parameters selected for the different machine learning algorithms.
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To evaluate the methods, a second database was created. This database with more fails, two for stage and make a test with the data previously training. The build was with 400 signals for each stage. Finally, classification was performed, and the accuracy of the four methods was evaluated see Table 4.

4.2 Classification

Once the parameters of interest for each of the analyzed algorithms were selected, we proceeded with the training and precision calculations using cross validation. The times required to perform the training classification of the selected samples are shown in Tables 2 and 3 shows the performance of the classifiers in terms of accuracy for each sample size. The NB method is the least complex among the classification methods; however, it demonstrates good results and easy implementation. The K-NN results are also acceptable, but this method runs very slowly, thus increasing computation time and memory usage. The results seems to be sufficient even though only 3.6% of the original data was used.

Table 2. Classification execution per signal times in microseconds (mS)
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Table 3. Classifier accuracy according to datatype.
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Like Lilula et al. [22], who proposed a fast and reliable power island detection method based on the wave coefficients of the transient waveforms, it was found, as it is shown in Table 3, the decision tree classifier produced the best accuracy.

5 Discussion

Table 2 show that the pattern recognition classification time is much smaller than the period time per cycle, it means that in one cycle the fail will be detected, also in Table 3 can be observe that accuracy to classification is superior to 70%. Decision Trees, K-NN and SVM are roughly equal. However, the presented methods are computationally efficient because it does not require higher training and does not require a large amount of memory and computer resources. In addition, it presented the highest precision of the studied algorithms. Among the other methods, the SVM presented the highest precision, even though it requires a long analysis time. The Decision Trees, conversely, was the fastest algorithm and had a precision better to that of the SVM, making this case the best option for this type of method. Additionally, in Table 4 is observed that despite without database training the accuracy is acceptable by sample 3 using NB, Decision Tree, and K–NN classifiers.

Table 4. Classifier accuracy for more fails for stage according to database.
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6 Conclusions

In this study, a new pattern recognition algorithm for automatic detection and location of faults in cascaded multilevel inverters was proposed and validated. The four tested and compared classifiers, namely NB, decision tree, K-NN and SVM show good accuracy in failure detection. The decision tree classifier showed the best results regardless of the number of descriptors, followed by SVM method which runs very slowly, which increases the calculation time and the memory usage. Furthermore, it was observed that a similar performance was obtained using the complete set of samples taken from a cycle of the output voltage waveform (120 descriptors) and the second half of the negative half cycle (30 descriptors) in all classifiers, except in NB. By summarizing, although there are more powerful techniques for pattern recognition, the K-NN classifier shows good performance and accuracy detecting and locating faults in the studied multilevel inverter. This work is being currently extended by involving more possible failure events with the aim to provide information to correctly reconfigure the inverter in a fault tolerance mode.

Simulated results using an inverter model were obtained, demonstrating the feasibility of the proposal. The effectiveness and performance of the method were assessed with tested with four different classifiers: NB, decision trees, K-NN and SVM. It was also observed the number of descriptors can be reduced without affecting the detection accuracy, which demonstrates the quality of the proposed classifier.