Abstract
A new method of the synthesis of finite state machines is proposed. In this method, the speed of FSM is taken into account already at the early stage of synthesis process. The method is based on sequential merging and splitting two internal states regarding to speed of FSM. This parameter may decrease with reduction of internal states, but splitting internal states leads to decrease of number of variables in logic functions which describe combinational part of FSM. This parameter has a great influence on a critical delay path. The results of experiments showing efficiency of proposed approach are also presented.
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The work was supported by the grant from Bialystok University of Technology and funded with resources for research by the Ministry of Science and Higher Education in Poland.
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Klimowicz, A. (2020). Combined State Splitting and Merging for Implementation of Fast Finite State Machines in FPGA. In: Saeed, K., Dvorský, J. (eds) Computer Information Systems and Industrial Management. CISIM 2020. Lecture Notes in Computer Science(), vol 12133. Springer, Cham. https://doi.org/10.1007/978-3-030-47679-3_6
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