Abstract
We present RVX, a tool for concolic testing of embedded binaries targeting RISC-V platforms with peripherals. RVX integrates the Concolic Testing Engine (CTE) with an Instruction Set Simulator (ISS) supporting the RISC-V RV32IMC Instruction Set Architecture (ISA). Further, RVX provides a designated CTE-interface for additional extensions. It is an extensible command layer that provides support for verification functions and enables integration of peripherals into the concolic simulation. The experiments demonstrate the applicability and efficiency of RVX in analyzing real-world embedded applications. In addition, we found a new serious bug in the RISC-V port of the newlib C library.
This work was supported in part by the German Federal Ministry of Education and Research (BMBF) within the project Scale4Edge under contract no. 16ME0127 and within the project VerSys under contract no. 01IW19001 and within the project SATiSFy under contract no. 16KIS0821K, and by the German Research Foundation (DFG) as part of the Collaborative Research Center (Sonderforschungsbereich) 1320 EASE – Everyday Activity Science and Engineering, University of Bremen (http://www.ease-crc.org/) in subproject P04.
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Notes
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Find the RISC-V ISA specification documents at https://riscv.org/specifications/.
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Visit http://systemc-verification.org/risc-v for the most recent updates on our RISC-V related approaches.
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Essentially, this will copy code and data from the text and data sections, respectively, as well as zero initialize memory according to the bss section, as specified in the ELF program headers.
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Herdt, V., Große, D., Drechsler, R. (2020). RVX - A Tool for Concolic Testing of Embedded Binaries Targeting RISC-V Platforms. In: Hung, D.V., Sokolsky, O. (eds) Automated Technology for Verification and Analysis. ATVA 2020. Lecture Notes in Computer Science(), vol 12302. Springer, Cham. https://doi.org/10.1007/978-3-030-59152-6_31
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