Abstract
Phase Change Memories combine byte addressability, non-volatility, and low energy consumption with densities comparable to storage devices and access speeds comparable to random access memory. This qualifies PCM as a successor technology to both DRAM and SSD. The only disadvantage is limited endurance (though still orders of magnitude higher than for Flash memory). Since PCM consume energy only when actively reading and writing and writing consumes much more energy than reading, reducing “bitflip pressure” is important not only in order to stretch endurance, but also to save energy.
We present two related contributions to relieve bitflip pressure. Many data structures use status or dirty bits that over the lifetime of a data structure such as a key value store can flip numerous times. We use balanced Gray codes to distribute the changes of a dirty bit across a whole byte. Our second construction offers a way to implement counters using Gray codes that have close to one bit-flip per increment.
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Alameldeen, A., Wood, D.: Frequent pattern compression: a significance-based compression scheme for L2 caches. Technical Report, University of Wisconsin-Madison (2004)
Bhat, G., Savage, C.: Balanced gray codes. Electron. J. Comb. 3, R25 (1996)
Bittman, D., et al.: Designing data STructures to minimize bit flips on NVM. In: 2018 IEEE 7th Non-Volatile Memory Systems and Applications Symposium, pp. 85–90 (2018)
Bittman, D., Long, D., Alvaro, P., Miller, E.: Optimizing systems for byte-addressable NVM by reducing bit flipping. In: 17th Conference on File and Storage Technologies, USENIX (2019)
Cho, S., Lee, H.: Flip-N-Write: A simple deterministic technique to improve PRAM write performance, energy and endurance. In: 42nd Annual IEEE/ACM International Symposium on Microarchitecture, pp. 347–357 (2009)
Dechev, D., Pierkelbauer, P., Stroustrup, D.: Understanding and effectively preventing the ABA problem in descriptor-based lock-free designs. In: 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, pp. 185–192 (2010)
Jacobvitz, A., Calderbank, R., Sorin, D.: Coset coding to extend the lifetime of memory. In: IEEE 19th International Symposium on High Performance Computer Architecture, pp. 222–233 (2013)
Jalili, M., Sarbazi-Azad, H.: Captopril: Reducing the pressure of bit flips on hot locations in non-volatile main memories. In: Conference on Design, Automation & Test in Europe, DATE 2016 (2016)
Han, M., Hun, Y., Ki, S.W., Lee, H., Park, I.: Content-aware bit shuffling for maximizing PCM endurance. ACM Trans. Des. Autom. Electron. Syst. 22(3), 1–26 (2017)
Knuth, D.: The art of computer programming: Generating all combinations and permutations, vol. 4, Fac. 2, Addison Wesley (2005)
Lee, B., Ipek, E., Mutlu, O., Burger, D.: Architecting phase change memory as a scalable DRAM alternative, ACM SIGARCH Comput. Architect. News 37(3), 2–13 (2009)
Maddah, R., Seyedzadeh, S., Melhem, R.: CAFO: cost aware flip optimization for asymmetric memories. In: IEEE 21st International Symposium on High Performance Computer Architecture, pp. 320–330 (2015)
Palangappa, P., Mohanram, K..: Flip-mirror-rotate: an architecture for bit-write reduction and wear leveling in non-volatile memories. In: Great Lakes Symposium on VLSI, pp. 221–224. ACM (2015)
Savage, C.: A survey of combinatorial Gray codes. SIAM Rev. 39(4), 605–629 (1997)
Suparta, I.N.: Counting sequences, Gray codes and Lexicodes, Ph.D. thesis, TU Delft (2006)
Wagner, D., West, J.: Construction of uniform Gray codes. Congressus Numerantium 80, 217–223 (1991)
Yang, B., Lee, J., Kim, J., Cho, J., Lee, S., Yu, B.: A low power phase-change random access memory using a data-comparison write scheme. In: 2007 IEEE International Symposium on Circuits and Systems, pp. 3014–3017 (2007)
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Kulandai, A.D.R., J, S., Rose, J., Schwarz, T. (2021). Balanced Gray Codes for Reduction of Bit-Flips in Phase Change Memories. In: Calzarossa, M.C., Gelenbe, E., Grochla, K., Lent, R., Czachórski, T. (eds) Modelling, Analysis, and Simulation of Computer and Telecommunication Systems. MASCOTS 2020. Lecture Notes in Computer Science(), vol 12527. Springer, Cham. https://doi.org/10.1007/978-3-030-68110-4_11
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DOI: https://doi.org/10.1007/978-3-030-68110-4_11
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