Abstract
Recent advances in High-Level Synthesis (HLS) allow software developers to offload compute kernels to FPGAs without deep knowledge about low-level hardware description languages. However, this abstraction comes at the cost of control over the bitstream and thus complicates features like partial reconfiguration. We introduce a vendor-agnostic high-level approach for time and space multiplexing on OpenCL-programmed FPGAs. It dynamically adjusts the FPGA’s configuration to provide load balancing between multiple kernels on the same device. Our method uses several configurations, each with a different amount of FPGA resources dedicated to the respective kernel. We introduce a model to decide which configuration is selected based on the projected runtime of the enqueued tasks. Our model and the implementation Forecast are demonstrated with an online scheduler on a current high-end FPGA. We find that Forecast makes automatic handling of configurations in HLS-applications possible.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Bosch, J., et al.: Application acceleration on FPGAs with OmpSs@FPGA. In: 2018 International Conference on Field-Programmable Technology (FPT), pp. 70–77. IEEE (2018)
F Intel: SDK for OpenCL. In: Programming Guide. UG-OCL002 31 (2016)
Pham, K.D., et al.: ZUCL: a ZYNQ Ultrascale+ framework for OpenCL HLS applications. In: FSP Workshop 2018; Fifth International Workshop on FPGAs for Software Programmers, pp. 1–9. VDE (2018)
Stone, J.E., Gohara, D., Shi, G.: OpenCL: a parallel programming standard for heterogeneous computing systems. Comput. Sci. Eng. 12(3), 66–73 (2010)
Vaishnav, A., et al.: Resource elastic virtualization for FPGAs using OpenCL. In: 2018 28th International Conference on Field Programmable Logic and Applications (FPL), pp. 111–1117. IEEE, Dublin (August 2018)
Vesper, M., Koch, D., Phama, K.: PCIeHLS: an OpenCL HLS framework. In: FSP 2017; Fourth International Workshop on FPGAs for Software Programmers, pp. 1–6. VDE (2017)
Wirbel, L.: Xilinx SDAccel: a unified development environment for tomorrow’s data center. The Linley Group Inc. (2014)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2021 Springer Nature Switzerland AG
About this paper
Cite this paper
Jungblut, P., Kranzlmüller, D. (2021). Dynamic Spatial Multiplexing on FPGAs with OpenCL. In: Derrien, S., Hannig, F., Diniz, P.C., Chillet, D. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2021. Lecture Notes in Computer Science(), vol 12700. Springer, Cham. https://doi.org/10.1007/978-3-030-79025-7_19
Download citation
DOI: https://doi.org/10.1007/978-3-030-79025-7_19
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-79024-0
Online ISBN: 978-3-030-79025-7
eBook Packages: Computer ScienceComputer Science (R0)