Abstract
Deep convolutional neural networks (DCNNs) have achieved great success in various applications. Nevertheless, training and deploying such DCNNs models require a huge amount of computation and storage resources. Weight pruning has emerged as an effective compression technique for DCNNs to reduce the consumption of hardware resources. However, existing weight pruning schemes neglect to simultaneously consider accuracy, compression ratio and hardware-efficiency in the design space, which inevitably leads to performance degradation. To overcome these limitations, in this work, we propose a cooperative weight/activation compression approach. Initially, we observe spatially insensitive consistency, namely the insensitive weight values that have no impact on accuracy distributed at the same spatial position in a mass of channels. Based on the key observation, we propose a cluster-based weight pattern pruning technique, which converges the channels with spatially insensitive consistency into a cluster and prunes them into the weight pattern with a uniform shape. In addition, there are many sparsity rows in the activation matrix due to the effect of the activation function–Rectifying Linear Unit (ReLU). We study the sparsity rows and find that rows with larger sparsity degree are insensitive to accuracy. Hence, we further propose a sparsity-row-based activation removal technique, which directly eliminates insensitive rows of activation. The two proposed techniques allow the hardware to execute at excellent parallel granularity and achieve better compression ratio with negligible accuracy loss. Experiment results on several popular DCNNs models show that our scheme reduces the computation by \(63\%\) on average.
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Acknowledgements
This research is supported by the grants from the National Science Foundation for Young Scientists of China (Grant No.61902218), the National Natural Science Foundation of China (Grant No. 92064008).
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Zhang, Y. et al. (2022). Accelerating DCNNs via Cooperative Weight/Activation Compression. In: Lai, Y., Wang, T., Jiang, M., Xu, G., Liang, W., Castiglione, A. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2021. Lecture Notes in Computer Science(), vol 13157. Springer, Cham. https://doi.org/10.1007/978-3-030-95391-1_43
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