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Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 13511))

Abstract

In embedded systems, tightly coupled memories (TCMs) are usually shared between multiple masters for the purpose of performance scalability, hardware efficiency and software flexibility. On the one hand, memory sharing improves area utilization, but on the other hand, this can lead to a performance degradation due to an increase in access conflicts. To mitigate the associated performance penalty, access interval prediction (AIP) has been proposed. In a similar fashion to branch prediction, AIP exploits program flow regularity to predict the cycle of the next memory access. We show that this structural similarity allows for adaption of state-of-the-art branch predictors, such as the TAgged GEometric history length (TAGE) branch predictor. Our analysis on memory access traces reveals that the obtained TAGE access interval predictor predicts over 97% of memory accesses outperforming all previously presented AIP schemes.

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References

  1. Haas, S., et al.: A heterogenous SDR MPSoC in 28 nm CMOS for low-latency wireless applications. In: DAC. ACM Press, New York (2017). https://doi.org/10.1145/3061639.3062188

  2. Wittig, R., Pauls, F., Matus, E., Fettweis, G.: Access interval prediction for tightly coupled memory systems. In: Pnevmatikatos, D.N., Pelcat, M., Jung, M. (eds.) SAMOS 2019. LNCS, vol. 11733, pp. 229–240. Springer, Cham (2019). https://doi.org/10.1007/978-3-030-27562-4_16

    Chapter  Google Scholar 

  3. Wittig, R., Hasler, M., Matus, E., Fettweis, G.: Statistical access interval prediction for tightly coupled memory systems. In: COOL CHIPS. IEEE (2019). https://doi.org/10.1109/CoolChips.2019.8721304

  4. Mittal, S.: A survey of techniques for dynamic branch prediction. Concurr. Comput. Pract. Exp. 31(1), 1–36 (2018)

    Google Scholar 

  5. Seznec, A., Michaud, P.: A case for (partially) TAgged GEometric history length branch prediction. J. Instruct. Level Parall. 8 (2006). https://www.jilp.org/vol8

  6. Guthaus, M.R., Ringenberg, J.S., Ernst, D., Austin, T.M., Mudge, T., Brown, R.B.: MiBench: a free, commercially representative embedded benchmark suite. In: 4th Annual Workshop on Workload Characterization. IEEE (2001)

    Google Scholar 

  7. Schoeberl, M., et al.: T-CREST: time-predictable multi-core architecture for embedded systems. J. Syst. Archit. 61(9), 449–471 (2015). https://doi.org/10.1016/j.sysarc.2015.04.002

  8. Paolieri, M., Quiñones, E., Carzola, F.J., Bernat, G., Valero, M.: Hardware support for WCET analysis of hard real-time multicore systems. In: ISCA. ACM Press, New York (2009). https://doi.org/10.1145/1555754.1555764

  9. Ax, J., et al.: CoreVA-MPSoC: a many-core architecture with tightly coupled shared and local data memories. IEEE Trans. Parallel Distrib. Syst. 29(5), 1030–1043 (2018). https://doi.org/10.1109/TPDS.2017.2785799

  10. Gelado, I., Cabezas, J., Stone, J.E., Patel, S., Navarro, N., Hwu, W.-M.W.: An asymmetric distributed shared memory model for heterogeneous parallel systems. In: ASPLOS. ACM Press, New York (2010). https://doi.org/10.1145/1736020.1736059

  11. Wittig, R., Hasler, M., Matus, E., Fettweis, G.: Queue based memory management unit for heterogeneous MPSoCs. In: DATE. IEEE (2019). https://doi.org/10.23919/DATE.2019.8715129

  12. Bates, D., Bradbury, A., Koltes, A., Mullins, R.: Exploiting tightly-coupled cores. In: SAMOS. IEEE (2013). https://doi.org/10.1109/SAMOS.2013.6621138

  13. Rahimi, A., Loi, I., Kakoee, M.R., Benini, L.: A fully-synthesizable single-cycle interconnection network for shared-L1 processor clusters. In: DATE. IEEE (2011). https://doi.org/10.1109/DATE.2011.5763085

  14. Gautschi, M., Rossi, D., Benini, L.: Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory. In: GLSVLSI. IEEE (2014). https://doi.org/10.1145/2591513.2591569

  15. Cleary, J., Witten, I.: Data compression using adaptive coding and partial string matching. IEEE Trans. Commun. 32(4), 396–402 (1984)

    Article  Google Scholar 

  16. Michaud, P.: A PPM-like, tag-based branch predictor. J. Instruct. Level Parall. 7, (2005). https://www.jilp.org/vol7

  17. Lowe-Power, J., et al. The gem5 simulator: version 20.0+. (2020). https://arxiv.org/abs/2007.03152

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Acknowledgment

This work was funded in part by the German Federal Ministry of Education and Research (BMBF) in the project “E4C” (project number 16ME0426K). We thank the Center for Information Services and High Performance Computing (ZIH) at TU Dresden for generous allocation of compute resources.

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Correspondence to Viktor Razilov .

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Razilov, V., Wittig, R., Matúš, E., Fettweis, G. (2022). Tagged Geometric History Length Access Interval Prediction for Tightly Coupled Memory Systems. In: Orailoglu, A., Reichenbach, M., Jung, M. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2022. Lecture Notes in Computer Science, vol 13511. Springer, Cham. https://doi.org/10.1007/978-3-031-15074-6_6

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  • DOI: https://doi.org/10.1007/978-3-031-15074-6_6

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-031-15073-9

  • Online ISBN: 978-3-031-15074-6

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