Abstract
Ternary content-addressable memory (TCAM) plays an important role in network. TCAM is used as high-speed search engine to achieve packet classification. Software-defined network (SDN) data plane is a typical application field where achieves network communication and security protection. Field-programmable gate array (FPGA) offers a programmable hardware platform to emulate TCAM based on static random-access memory (SRAM). However, block RAM resource on FPGA is finite and SRAM-based TCAM structure consumes a large number of block RAMs. Existing methods aim memory utilization to do lots of research. However, memory resources remain to be tight with increasing demand of network packet complexity. Aiming to memory utilization, this paper presents a multi-region SRAM-based TCAM structure. Our method divides entry into address field and data field. The first data pre-processing determines suitable parameter closely related to memory utilization and classification principle in two types of field. The second mapping mechanism is mapping data field to SRAM memory cell combined with longest prefix feature for IP address. The proposed design efficiently reduces consumed numbers of block RAMs on FPGA. Our proposed design is implemented on a Xilinx Virtex FPGA device. Compared to existing SRAM-based TCAMs, our method reduces 33.5938% memory space for a rule set with size of \( 2048 \times 64 \). With increasing scale of rule sets, proposed design has better and more stable memory utilization.
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Acknowledgement
This work is supported by Project of Chinese Academy of Sciences (Grant No. KGFZD-145-21-03).
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Zou, Q., Zhang, N., Guo, F., Kong, Q., Lv, Z. (2022). Multi-region SRAM-Based TCAM for Longest Prefix. In: Su, C., Sakurai, K., Liu, F. (eds) Science of Cyber Security. SciSec 2022. Lecture Notes in Computer Science, vol 13580. Springer, Cham. https://doi.org/10.1007/978-3-031-17551-0_29
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DOI: https://doi.org/10.1007/978-3-031-17551-0_29
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