Exploring Memory Hierarchy Design with Emerging Memory Technologies

1. Front Matter

   Pages i-vii

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2. Introduction

   • Guangyu Sun

   Pages 1-11

3. Replacing Different Levels of the Memory Hierarchy with NVMs

   • Guangyu Sun

   Pages 13-67

4. Moguls: A Model to Explore the Memory Hierarchy for Throughput Computing

   • Guangyu Sun

   Pages 69-92

5. Exploring the Vulnerability of CMPs to Soft Errors with 3D Stacked Non-Volatile Memory

   • Guangyu Sun

   Pages 93-117

6. Conclusions

   • Guangyu Sun

   Pages 119-120

7. Back Matter

   Pages 121-122

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This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc.  The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the “memory wall.”  The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification;  hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named “Moguls” is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs.

• Emerging Memory
• Memory Design
• Memory Hierarchy
• Memory Wall
• Nonvolatile Memory
• Real-time Embedded Systems
• Soft Errors

• Peking University, Haidian District, Beijing, China, People's Republic

  Guangyu Sun

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