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A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing

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Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 240))

Abstract

High Level Languages (HLLs) make programming easier and more efficient; therefore, powerful applications can be written, modified, and debugged easily. Nowadays, applications can be divided into parallel tasks and run on different processing elements, such as CPUs, GPUs, or FPGAs; for achieving higher performance. However, in the case of FPGAs, generating hardware modules automatically from high level representation is one of the major research activities in the last few years. Current research focuses on designing programming platforms that allow parallel applications to be run on different platforms, including FPGA. In this paper, a survey of HLLs, tools, and compilers used for translating high level representation to hardware description language is presented. Technical analysis of such tools and compilers is discussed as well.

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Correspondence to Luka Daoud .

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Daoud, L., Zydek, D., Selvaraj, H. (2014). A Survey of High Level Synthesis Languages, Tools, and Compilers for Reconfigurable High Performance Computing. In: SwiÄ…tek, J., Grzech, A., SwiÄ…tek, P., Tomczak, J. (eds) Advances in Systems Science. Advances in Intelligent Systems and Computing, vol 240. Springer, Cham. https://doi.org/10.1007/978-3-319-01857-7_47

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  • DOI: https://doi.org/10.1007/978-3-319-01857-7_47

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-01856-0

  • Online ISBN: 978-3-319-01857-7

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