Abstract
In a Simultaneous Multi-Threaded (SMT) processor environment, threads share datapath resources, and resource allocation policy directly affects the throughput metric. As a way of explicit resource management, resource requirements of threads are estimated based on several runtime statistics, such as cache miss counts, Issue Queue usage and efficiency metrics. Controlling processor resources indirectly by means of a fetch policy is also targeted in many recent studies. A successful technique, Speculative Instruction Window Weighting (SIWW), which speculates the weights of instructions in Issue Queue to indirectly manage SMT resource usage, is recently proposed. SIWW promises better peformance results compared to the well-accepted ICOUNT fetch policy. In this study, we propose an alternative fetch policy that implements SIWW-like logic using a history-based prediction mechanism, History-based Predictive Instruction Window Weighting (HPIWW), avoiding any types of speculation hardware and its inherent complexity. As a result, we show that HPIWW outperforms SIWW by 3% on the average across all simulated workloads, and dissipates 2.5 times less power than its rival.
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Kucuk, G., Uslu, G., Yesil, C. (2014). History-Based Predictive Instruction Window Weighting for SMT Processors. In: Kunkel, J.M., Ludwig, T., Meuer, H.W. (eds) Supercomputing. ISC 2014. Lecture Notes in Computer Science, vol 8488. Springer, Cham. https://doi.org/10.1007/978-3-319-07518-1_12
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DOI: https://doi.org/10.1007/978-3-319-07518-1_12
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