Abstract
Many of the current supercomputers tend to pursue higher peak performance, however, the characteristics of scientific applications are getting diversified, and their sustained performance strongly depends on not only the peak floating point operation performance of the system, but also its memory bandwidth. NEC’s goal is to provide superior sustained performance, especially for memory-intensive scientific applications. As the successor to the SX-9, its brand-new SX-ACE vector supercomputer has been developed to achieve this goal. The new vector processor features the world top-class single core performance of 64Gflop/s with the largest memory bandwidth of 64GB/s per core. Four cores, memory controllers, and a network controller are integrated into the SX-ACE processor, enabling the processor performance of 256Gflop/s with its memory bandwidth of 256GB/s. In order to gain a higher sustained performance, the system is equipped with a specialized network interconnecting processors, as well as a sophisticated vectorization compiler and an operating system.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Satoshi, N., Satoru, T., Norihito, N., Takayuki, W., Akihiro, S.: Hardware Technology of the SX-9 (1) -Main System-. NEC Technical Journal 3(4), 15–18 (2008)
Takahara, H.: NEC SX Series Vector Supercomputer. In: Encyclopedia of Parallel Computing, vol. 4, pp. 1268–1277. Springer (2011)
Soga, T., Musa, A., Shimomura, Y., Itakura, K., Okabe, K., Egawa, R., Takizawa, H., Kobayashi, H.: Performance Evaluation on NEC SX-9 using Real Science and Engineering Applications. In: Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, pp. 1–12 (2009)
Zeiser, T., Hager, G., Wellein, G.: The world’s fastest CPU and SMP node: Some performance results from the NEC SX-9. In: Proceedings of IEEE International Symposium on Parallel & Distributed Processing (IPDPS 2009), pp. 1–8 (2009)
Working group of the Ministry of Education, Culture, Sports, Science and Technology of Japan, White Paper for Strategic Direction/Development of HPC in Japan (2012)
Prabhakear, R., Vazhkudai, S.S., Kim, Y., Butt, A.R., Li, M., Kandemir, M.: Provisioning a Multi-tiered Data Staging Area for Extreme-Scale Machines. In: Proceedings of 31st International Conference on Distributed Computing Systems, ICDCS (2011)
McCalpin, J.: Memory bandwidth and machine balance in current high performance computers. In: IEEE Computer Society Technology committee on Computer Architecture (TCCA) Newsletter, pp. 19–25 (1995)
Kobayashi, H.: Implication of Memory Performance in Vector-Parallel and Scalar-Parallel HEC Systems. In: High Performance Computing on Vector Systems 2006, pp. 21–50. Springer, Heidelberg (2007)
Kogge, P.M., Dysart, T.J.: Using TOP500 to Trace and Project Technology and Architecture Trends. In: Proceedings of SC (2011)
Hill, M.D., Marty, M.R.: Amdahl’s Law in the Multicore Era. IEEE Computer 41(7), 33–38 (2008)
Takahashi, K., Goto, K., Fuchigami, H., Azami, A., Kataumi, K.: World-highest Resolution Global Atmospheric Model and Its Performance on the Earth Simulator. In: Proceedings of 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC), pp. 1–12 (2011)
Micron System Power Calculators, http://www.micron.com/products/support/power-calc
Musa, A., Sato, Y., Soga, T., Egawa, R., Takizawa, H., Okabe, K., Kobayashi, H.: Effect of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. In: Proceedings of International Symposium on Parallel and Distributed Processing with Applications, pp. 335–342 (2008)
The Himeno benchmark, http://accc.riken.jp/2444.htm
Sato, Y., Inoguchi, Y., Luk, W., Nakamura, T.: Evaluating Reconfigurable Dataflow Computing Using the Himeno Benchmark. In: Proceedings of International Conference on Reconfigurable Computing and FPGAs (ReConFig), pp. 1–7 (2012)
Kerbyson, D.J., Barker, K.J., Vishnu, A., Hoisie, A.: Comparing the Performance of Blue Gene/Q with Leading Cray XE6 and InfiniBand Systems. In: Proceedings of 2012 IEEE 18th International Conference on Parallel and Distributed System, pp. 556–563 (2012)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this paper
Cite this paper
Momose, S., Hagiwara, T., Isobe, Y., Takahara, H. (2014). The Brand-New Vector Supercomputer, SX-ACE. In: Kunkel, J.M., Ludwig, T., Meuer, H.W. (eds) Supercomputing. ISC 2014. Lecture Notes in Computer Science, vol 8488. Springer, Cham. https://doi.org/10.1007/978-3-319-07518-1_13
Download citation
DOI: https://doi.org/10.1007/978-3-319-07518-1_13
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-07517-4
Online ISBN: 978-3-319-07518-1
eBook Packages: Computer ScienceComputer Science (R0)