Abstract
In the paper a variable-, fractional-order PID (VFOPID) controller microprocessor realization problems are discussed. In such controllers the variable-, fractional-orders backward differences and sums (VFOBD/S) are used to perform closed-loop system error discrete-time differentiation and integration. In practice all digitally differentiated and integrated signals are noised so there is a necessity of a digital signal pre-filtering. This additionally loads the DSP system. A solution of this problem is proposed. Also the possibilities of the VFOPID controller DSP realizations are presented and compared with the computer simulation results.
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Ostalczyk, P.W., Duch, P., Brzeziński, D.W., Sankowski, D. (2015). Order Functions Selection in the Variable-, Fractional-Order PID Controller. In: Latawiec, K., Łukaniszyn, M., Stanisławski, R. (eds) Advances in Modelling and Control of Non-integer-Order Systems. Lecture Notes in Electrical Engineering, vol 320. Springer, Cham. https://doi.org/10.1007/978-3-319-09900-2_15
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DOI: https://doi.org/10.1007/978-3-319-09900-2_15
Publisher Name: Springer, Cham
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