Abstract
The growth of digital content and information through the World Wide Web is increasing rapidly and more of this traffic is generated by smart mobile low size, weight, and power (SWaP) devices that are constantly sending/receiving information to/from the network for up-to-date operation. In terms of data, according to an IDC report by Gantz and Reinsel in 2012 [1], from 2005 to 2020, the digital universe will grow by a factor of 300, from 130 to 40,000 exabytes, and from now until 2020, the digital universe will about double every 2 years. The size of the digital universe in 2010 was estimated at 1,227 exabytes [1] in particular. Therefore, it can be expected that an increasing number of low SWaP devices will be implemented to offer enhanced functionality in terms of the complexity and number of services offered to users within the physically and electronically constrained form factor architecture. From a network security stand point, it will be important for the Army to ensure security and trust in the operation and functionality of smart mobile tactical devices. However, from the user’s point of view, performance degradation due to security add-ons may degrade device performance during operation and during operations where speed is critical, enhanced security could degrade operational effectiveness. Therefore, it is the main goal of this effort to perform basic research in methods and techniques to provide security to mobile tactical networks while ensuring low SWaP technical requirements for operation. In this pursuit, we have considered two basic research areas that could provide a revolutionary solution to the problem. The first technology area is memristor-based computing and the second area is artificial neural networks. It is expected that memristor-based physical computing architectures will deliver ultra-low SWaP and neural networks will enable parallelism and reconfiguration benefits. This chapter will provide a brief overview of the memristor technology and its applications within neural networks and their potential application to enabling human cognition augmentation in the Cyber-domain.
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References
John Gantz and David Reinsel, “THE DIGITAL UNIVERSE IN 2020: Big Data, Bigger Digital Shadows, and Biggest Growth in the Far East”, IDC IVIEW Report, http://www.emc.com/collateral/analyst-reports/idc-the-digital-universe-in-2020.pdf, Sponsored by EMC. Dec. 2012.
L.O. Chua, “Memristor - the missing circuit element,” IEEE Trans. Circuit Theory, 18 (1971) 507–519.
Dmitri B. Strukov, Gregory S. Snider, Duncan R. Stewart, and R. Stanley Williams, “The missing memristor found,” Nature 453 (2008), 80–83.
R. Williams, “How We Found The Missing Memristor,” IEEE Spectrum, 45 (2008) 28-35. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=4687366&isnumber=4467055
R.E Pino, J.W. Bohl, N. McDonald, B. Wysocki, P. Rozwood, K. Campbell, A Timilsina, “Compact method for modeling and simulation of memristor devices: Ion conductor chalcogenide-based memristor devices,” 2010 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Anaheim, CA, June 17-18 (2010) pp 1-4. http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=5510936&isnumber=5510921
Chris Yakopcic, Tarek M. Taha, Guru Subramanyam, and Robinson E. Pino, “Memristor SPICE Model and Crossbar Simulation Based on Devices with Nanosecond Switching Time,” Proceedings of International Joint Conference on Neural Networks, Dallas, Texas, USA, August 4-9, 2013, pp.
C. Yakopcic, T.M. Taha, G. Subramanyam, R.E. Pino, S. Rogers, “A Memristor Device Model,” IEEE Electron Device Letters, 32 (2011) 1436-1438.
Robert Kozma, Robinson E. Pino, and Giovanni E. Pazienza, “Are Memristors the Future of AI?,” R. Kozma et al. (eds.), Advances in Neuromorphic Memristor Science and Applications, Springer, New York, 2012, pp 9-14.
Qiangfei Xia, Warren Robinett, Michael W. Cumbie, Neel Banerjee, Thomas J. Cardinali, J. Joshua Yang, Wei Wu, Xuema Li, William M. Tong, Dmitri B. Strukov, Gregory S. Snider, Gilberto Medeiros-Ribeiro, and R. Stanley Williams, “Memristor−CMOS Hybrid Integrated Circuits for Reconfigurable Logic,” Nano Letters 9 (2009) 3640-3645.
M. Shevenell, “Task 2 - Research Emerging Technologies for Embedded High Performance Intelligent Sensor,” ARL internal presentation, Security for Tactical Operations Relying on Methods for Enhancing Robustness (STORMER), 1st Quarter Review 2013 STORMER Team,
Joshua S. White, Thomas Fitsimmons, Jeanna N. Matthews, “Quantitative Analysis of Intrusion Detection Systems Snort and Suricata,” SPIE Defence and Security, Sensing, Cyber Sensing 2013, Proc. of SPIE 8757 (2013) pp. 875704-1-12.
PowerEdge R717 Techical Guide, http://www.dell.com/downloads/global/products/pedge/en/Poweredge-r715-technicalguide.pdf (Viewed on September 12, 2013).
FAQs, Raspberry Pi, <http://www.raspberrypi.org/faqs>, (9 September 2013)
R. Pino, “Reconfigurable Electronic Circuit,” United States Patent 7902857, March 8 (2011).
R. Pino, “Neuromorphic Computer,” United States Patent 8275728, September 25 (2012).
R. Pino, J. Bohl, “Self-Reconfigurable Memristor-Based Analog Resonant Computer,” United States Patent 8274312, September 25 (2012).
Robinson E. Pino, Youngok K. Pino, “Reconfigurable memristor-based computing logic,” United States Patent US 8427203 B2, April 23 (2013).
G.S. Rose, R. Pino, Q. Wu, “A low-power memristive neuromorphic circuit utilizing a global/local training mechanism,” Proceedings of International Joint Conference on Neural Networks (IJCNN), San Jose, CA, July 31-5, 2011, pp. 2080 – 2086.
David Bol, Dina Kamel, Denis Flandre, Jean-Didier Legat, “Nanometer MOSFET effects on the minimum-energy point of 45nm subthreshold logic,” Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design (ISLPED), San Fancisco, CA, August 19–21, 2009, pp. 3-8.
R. Pino, H. Li, Y. Chen, M. Hu. B. Liu, “Statistical memristor modeling and case study in neuromorphic computing,” 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC), San Francisco, CA, June 3-7, 585 - 590 (2012).
McCulloch and Pitts, “A logical calculus of the ideas immanent in nervous activity,” Bulletin of Mathematical Biophysics, 5 (1943) 115-133.
O. L. Mangasarian, “Linear and Nonlinear Separation of Patterns by Linear Programming,” Operations Research, 13 (1965) 444-452.
Paul J. Werbos, “Beyond Regression: New Tools for Prediction and Analysis in the Behavioral Sciences,” PhD thesis, Harvard University (1974).
Paul J. Werbos, “Backpropagation through time: what it does and how to do it,” Proceedings of the IEEE, 78 (1990) 1550 – 1560.
S. Pervez, I. Ahmad, A. Akram, S. U. Swati, “A Comparative Analysis of Artificial Neural Network Technologies in Intrusion Detections Systems,” Proc. of the 6th WSEAS International Conference on Multimedia, Internet & Video Technologies, Lisbon, Portugal, September 22-24 (2006).
J.P. Anderson, “Computer Security Threat Monitoring and Surveillance,” Technical Report, J.P. Anderson Company, Fort Washington, Pennsylvania April (1980).
D. Denning, “An Intrusion-Detection Model,” IEEE Tran Software Engineering, SE-13(2) 222-232 (1987).
J. Cannady, “Artificial Neural Networks for Misuse Detection,” Proc. 21st National Information Systems Security Conference, Arlington, VA, October 5-8 (1998).
T. Vollmer, M. Manic, “Computationally Efficient Neural Network Intrusion Security Awareness,” Proc. 2nd International Symposium on Resilient Control Systems, Idaho Falls, ID, August 11 - 13 (2009).
H.G. Kayacik, A.N. Zincir-Heywood, M.I. Heywood, “On the capability of an SOM based intrusion detection system,” 2003 IEEE Proceedings of the International Joint Conference on Neural Networks (IJCNN 2003) July 20-24, 2003, pp.1808,1813
KDD Cup 1999 Data, The UCI KDD Archive Information and Computer Science University of California, <http://kdd.ics.uci.edu/databases/kddcup99/kddcup99.html> (9 September 2013).
Domain Names - Implementation And Specification, http://www.ietf.org/rfc/rfc1035.txt, (viewed on September 11, 2013)
tcpdump, http://www.tcpdump.org/ (viewed on July 23, 2013).
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Pino, R.E., Kott, A. (2014). Neuromorphic Computing for Cognitive Augmentation in Cyber Defense. In: Pino, R., Kott, A., Shevenell, M. (eds) Cybersecurity Systems for Human Cognition Augmentation. Advances in Information Security, vol 61. Springer, Cham. https://doi.org/10.1007/978-3-319-10374-7_2
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DOI: https://doi.org/10.1007/978-3-319-10374-7_2
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