Abstract
We present an algorithm to automatically extract inductive modulo-2 linear invariants from a design. This algorithm makes use of basic linear algebra and is realized on top of an incremental SAT solver. The experimental results demonstrate that a large number of designs possess linear invariants that can be efficiently found by our method. We study how these invariants can be helpful in the contexts of model checking and synthesis.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Aleksandrowicz, G., Ivrii, A., Margalit, O., Rasin, D.: Generating modulo-2 linear invariants for hardware model checking. Full version with appendix, available at http://researcher.watson.ibm.com/researcher/files/il-ALEXI/xor.pdf
Bradley, A.R.: SAT-based model checking without unrolling. In: Jhala, R., Schmidt, D. (eds.) VMCAI 2011. LNCS, vol. 6538, pp. 70–87. Springer, Heidelberg (2011)
Chauhan, P., Clarke, E.M., Kroening, D.: A sat-based algorithm for reparameterization in symbolic simulation. In: DAC, pp. 524–529 (2004)
Case, M.L., Mishchenko, A., Brayton, R.K.: Inductively finding a reachable state space over-approximation. In: IWLS (2006)
Case, M.L., Mishchenko, A., Brayton, R.K.: Automated extraction of inductive invariants to aid model checking. In: FMCAD, pp. 165–172 (2007)
Cabodi, G., Nocco, S., Quer, S.: Boosting the role of inductive invariants in model checking. In: DATE, pp. 1319–1324 (2007)
CryptoMiniSat, http://www.msoos.org/cryptominisat2/
Eén, N., Sörensson, N.: An extensible SAT-solver. In: Giunchiglia, E., Tacchella, A. (eds.) SAT 2003. LNCS, vol. 2919, pp. 502–518. Springer, Heidelberg (2004)
Fuhrmann, O., Hoory, S.: On extending bounded proofs to inductive proofs. In: Bouajjani, A., Maler, O. (eds.) CAV 2009. LNCS, vol. 5643, pp. 278–290. Springer, Heidelberg (2009)
Hardware Model Checking Competition (2011), http://fmv.jku.at/hwmcc11
Hardware Model Checking Competition (2013), http://fmv.jku.at/hwmcc13
King, A., Søndergaard, H.: Inferring congruence equations using SAT. In: Gupta, A., Malik, S. (eds.) CAV 2008. LNCS, vol. 5123, pp. 281–293. Springer, Heidelberg (2008)
King, A., Søndergaard, H.: Automatic abstraction for congruences. In: Barthe, G., Hermenegildo, M. (eds.) VMCAI 2010. LNCS, vol. 5944, pp. 197–213. Springer, Heidelberg (2010)
Mony, H., Baumgartner, J., Mishchenko, A., Brayton, R.K.: Speculative reduction-based scalable redundancy identification. In: DATE, pp. 1674–1679 (2009)
Mony, H., Baumgartner, J., Paruthi, V., Kanzelman, R., Kuehlmann, A.: Scalable automated verification via expert-system guided transformations. In: Hu, A.J., Martin, A.K. (eds.) FMCAD 2004. LNCS, vol. 3312, pp. 159–173. Springer, Heidelberg (2004)
McMillan, K.L.: Interpolation and SAT-based model checking. In: Hunt Jr., W.A., Somenzi, F. (eds.) CAV 2003. LNCS, vol. 2725, pp. 1–13. Springer, Heidelberg (2003)
Müller-Olm, M., Seidl, H.: Analysis of modular arithmetic. ACM Trans. Program. Lang. Syst. 29(5) (2007)
van Eijk, C.A.J.: Sequential equivalence checking based on structural similarities. IEEE Trans. on CAD of Integrated Circuits and Systems 19(7), 814–819 (2000)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this paper
Cite this paper
Aleksandrowicz, G., Ivrii, A., Margalit, O., Rasin, D. (2014). Generating Modulo-2 Linear Invariants for Hardware Model Checking. In: Yahav, E. (eds) Hardware and Software: Verification and Testing. HVC 2014. Lecture Notes in Computer Science, vol 8855. Springer, Cham. https://doi.org/10.1007/978-3-319-13338-6_5
Download citation
DOI: https://doi.org/10.1007/978-3-319-13338-6_5
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-13337-9
Online ISBN: 978-3-319-13338-6
eBook Packages: Computer ScienceComputer Science (R0)