Skip to main content

Towards a Frequency Domain Processor for Real-Time SIFT-based Filtering

  • Chapter
  • First Online:
Applications in Electronics Pervading Industry, Environment and Society

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 351))

  • 960 Accesses

Abstract

The Scale Invariant Feature Transform (SIFT) extracts relevant features from images and video frames. The extracted features are robust against luminance variations, geometrical transformations, and image resolution. Due to its performances, the SIFT algorithm is of great importance in fields such as object recognition, content retrieval from image databases, robotic navigation, and gesture recognition. Main drawback of the SIFT algorithm is the high computational complexity. This paper presents the development of a hardware filtering accelerator for the implementation of SIFT-based visual search. The accelerator works in the frequency domain, operating on a block-by-block basis. This enables to work faithfully to the original Scale-Space theory, which employes non-separable Laplacian of Gaussian (LoG) filters. The targeted throughput is of \(\sim \)20 fps, making the coprocessor suitable for real time processing.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Lowe, D.: Distinctive image features from scale-invariant keypoints. Int. J. Comput. Vision 60, 91–110 (2004)

    Article  Google Scholar 

  2. Lindeberg, T.: Scale-space theory: a basic tool for analyzing structures at different scales. J. Appl. Stat. 21, 225–270 (1994)

    Google Scholar 

  3. Mikolajczyk, K., Schmid, C.: A performance evaluation of local descriptors. In: Proceedings. 2003 IEEE Computer Society Conference on Computer Vision and Pattern Recognition, vol 2, pp. II-257. IEEE (2003)

    Google Scholar 

  4. Heymann, S., Frhlich, B., Medien, F., Mller, K., Wiegand, T.: SIFT implementation and optimization for general-purpose gpu. In: WSCG 07 (2007)

    Google Scholar 

  5. Zhang, Q., Chen, Y., Zhang, Y., Xu, Y.: SIFT implementation and optimization for multi-core systems. In: IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2008, pp. 1–8. IEEE (2008)

    Google Scholar 

  6. Bonato, V., Marques, E., Constantinides, G.A.: A parallel hardware architecture for scale and rotation invariant feature detection. IEEE Trans. Circuits Syst. Video Technol. 18, 1703–1712 (2008)

    Article  Google Scholar 

  7. Zhong, S., Wang, J., Yan, L., Kang, L., Cao, Z.: A real-time embedded architecture for SIFT. J. Syst. Archit. 59, 16–29 (2013)

    Article  Google Scholar 

  8. Jiang, J., Li, X., Zhang, G.: SIFT hardware implementation for real-time image feature extraction. IEEE Trans. Circuits Syst. Video Technol. 24, 1209–1220 (2014)

    Google Scholar 

  9. Hunt, B.: Minimizing the computation time for using the technique of sectioning for digital filtering of pictures. IEEE Trans. Comput. 100, 1219–1222 (1972)

    Article  Google Scholar 

  10. Garofalo, V., Petra, N., De Caro, D., Strollo, A., Napoli, E.: Low error truncated multipliers for DSP applications. Proc. ICECS 2008, 29–32 (2008)

    Google Scholar 

  11. Garofalo, V., Coppola, M., De Caro, D., Napoli, E., Petra, N., Strollo, A.: A novel truncated squarer with linear compensation function. ISCAS 2010, 4157–4160 (2010)

    Google Scholar 

  12. De Caro, D., Petra, N., Strollo, A., Tessitore, F., Napoli, E.: Fixed-width multipliers and multipliers-accumulators with min-max approximation error. IEEE Trans. Circuits Syst. I Regul. Pap. 60, 2375–2388 (2013)

    Article  MathSciNet  Google Scholar 

  13. Petra, N., De Caro, D., Garofalo, V., Napoli, E., Strollo, A.: Truncated squarer with minimum mean-square error. Microelectron. J. 45, 799–804 (2014)

    Google Scholar 

  14. Genovese, M., Napoli, E.: FPGA-based architecture for real time segmentation and denoising of HD video. J. Real-Time Image Proc. 8, 389–401 (2013)

    Article  Google Scholar 

  15. Genovese, M., Napoli, E.: ASIC and FPGA implementation of the gaussian mixture model algorithm for real-time segmentation of high definition video. IEEE Trans. VLSI Syst. 22, 537–547 (2014)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Giorgio Lopez .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2016 Springer International Publishing Switzerland

About this chapter

Cite this chapter

Lopez, G., Napoli, E., Strollo, A.G.M. (2016). Towards a Frequency Domain Processor for Real-Time SIFT-based Filtering. In: De Gloria, A. (eds) Applications in Electronics Pervading Industry, Environment and Society. Lecture Notes in Electrical Engineering, vol 351. Springer, Cham. https://doi.org/10.1007/978-3-319-20227-3_21

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-20227-3_21

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-20226-6

  • Online ISBN: 978-3-319-20227-3

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics