Skip to main content

Low Power Programmable Gain Analog to Digital Converter for Integrated Neural Implant Front End

  • Conference paper
  • First Online:
  • 784 Accesses

Part of the book series: Communications in Computer and Information Science ((CCIS,volume 574))

Abstract

Integrated neural implants interface with the brain using biocompatible electrodes to provide high yield cell recordings, large channel counts and access to spike data and/or field potentials with high signal-to-noise ratio. By increasing the number of recording electrodes, spatially broad analysis can be performed that can provide insights on how and why neuronal ensembles synchronize their activity. However, the maximum number of channels is constrained by noise, area, bandwidth, power, thermal dissipation and the scalability and expandability of the recording system. In this chapter, we characterize the noise fluctuations on a circuit-architecture level for efficient hardware implementation of programmable gain analog to digital converter for neural signal-processing. This approach provides key insight required to address signal-to-noise ratio, response time, and linearity of the physical electronic interface. The proposed methodology is evaluated on a prototype converter designed in standard single poly, six metal 90-nm CMOS process.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   39.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

References

  1. Nicolelis, M.A.L.: Actions from thoughts. Nature 409, 403–407 (2001)

    Article  Google Scholar 

  2. Frey, U., et al.: An 11 k-electrode 126-channel high-density micro-electrode array to interact with electrogenic cells. IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 158–159 (2007)

    Google Scholar 

  3. Georgopoulos, A.P., Schwartz, A.B., Kettner, R.E.: Neuronal population coding of movement direction. Science 233(4771), 1416–1419 (1986)

    Article  Google Scholar 

  4. Chae, C., et al.: A 128-channel 6 mw wireless neural recording IC with spike feature extraction and UWB transmitter. IEEE Trans. Neural Syst. Rehabil. Eng. 17(4), 312–321 (2009)

    Article  Google Scholar 

  5. Yin, M., Ghovanloo, M.: A low-noise preamplifier with adjustable gain and bandwidth for bio potential recording applications. In: IEEE International Symposium on Circuits and Systems, pp. 321–324 (2007)

    Google Scholar 

  6. Shahrokhi, F., et al.: The 128-channel fully differential digital integrated neural recording and stimulation interface. IEEE Trans. Biomed. Circuits Syst. 4(3), 149–161 (2010)

    Article  Google Scholar 

  7. Gao, H., et al.: HermesE: a 96-channel full data rate direct neural interface in 0.13um CMOS. IEEE J. Solid-State Circuits 47(4), 1043–1055 (2012)

    Article  Google Scholar 

  8. Han, D., et al.: A 0.45 V 100-channel neural-recording IC with sub-μW/channel comsumption in 0.18 μm CMOS. IEEE Trans. Biomed. Circuits Syst. 7(6), 735–746 (2013)

    Article  Google Scholar 

  9. Chae, M.S., Liu, W., Sivaprakasham, M.: Design optimization for integrated neural recording systems. IEEE J. Solid-State Circuits 43(9), 1931–1939 (2008)

    Article  Google Scholar 

  10. Seese, T.M., Harasaki, H., Saidel, G.M., Davies, C.R.: Characterization of tissue morphology, angiogenesis, and temperature in the adaptive response of muscle tissue to chronic heating. Lab. Invest. 78(12), 1553–1562 (1998)

    Google Scholar 

  11. de Zeeuw, C.I., et al.: Spatiotemporal firing patterns in the cerebellum. Nat. Rev. Neurosci. 12(6), 327–344 (2011)

    Article  Google Scholar 

  12. Kölbl, F., et al.: In vivo electrical characterization of deep brain electrode and impact on bio-amplifier design. In: Proceedings of IEEE Biomedical circuits and Systems Conference, pp. 210–213 (2010)

    Google Scholar 

  13. West, A.C., Newman, J.: Current distributions on recessed electrodes. J. Electrochem. Soc. 138(6), 1620–1625 (1991)

    Article  Google Scholar 

  14. Harpe, P., Cantatore, E., van Roermund, A.: A 10b/12b 40 kS/s SAR ADC with data-driven noise reduction achieving up to 10.1b ENOB at 2.2 fJ/conversion-Step. IEEE J. Solid-State Circuits 48(12), 3011–3018 (2013)

    Article  Google Scholar 

  15. Rodríguez-Pérez, L., et al.: A 64-channel inductively-powered neural recording sensor array. In: Proceedings of IEEE Biomedical Circuits and Systems Conference, pp. 228–231 (2012)

    Google Scholar 

  16. Harrison, R., et al.: A low-power integrated circuit for a wireless 100-electrode neural recording system. IEEE J. Solid-State Circuits 42(1), 123–133 (2007)

    Article  Google Scholar 

  17. Harrison, R.: The design of integrated circuits to observe brain activity. Proc. IEEE 96(7), 1203–1216 (2008)

    Article  Google Scholar 

  18. Hodgkin, A., Huxley, A.: A quantitative description of membrane current and its application to conduction and excitation in nerve. J. Physiol. 117, 500–544 (1952)

    Article  Google Scholar 

  19. Fox, R.F., Lu, Y.-N.: Emergent collective behavior in large numbers of globally coupled independently stochastic ion channels. Phys. Rev. E. 49, 3421–3431 (1994)

    Article  Google Scholar 

  20. Gray, P.R., Meyer, R.G.: Analysis and Design of Analog Integrated Circuits. Wiley, New York (1984)

    Google Scholar 

  21. Demir, E., Liu, A., Sangiovanni-Vincentelli, A.: Time-domain non-Monte Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations. In: Proceedings of IEEE International Conference on Computer Aided Design, pp. 598–603 (1994)

    Google Scholar 

  22. Yang, Z., Zhao, Q., Keefer, E., Liu, W.: Noise characterization, modeling, and reduction for in vivo neural recording. Advances in Neural Information Processing Systems, pp. 2160–2168 (2010)

    Google Scholar 

  23. Fischer, J.H.: Noise sources and calculation techniques for switched capacitor filters. IEEE J. Solid-State Circuits 17(4), 742–752 (1982)

    Article  Google Scholar 

  24. Sepke, T., Holloway, P., Sodini, C.G., Lee, H.-S.: Noise analysis for comparator-based circuits. IEEE Trans. Circuits Syst.-I 56(3), 541–553 (2009)

    Article  MathSciNet  Google Scholar 

  25. Enz, C., Cheng, Y.: MOS transistor modeling for RF IC design. IEEE J. Solid-State Circuits 35(2), 186–201 (2000)

    Article  Google Scholar 

  26. Jindal, R.P.: Compact noise models for MOSFETs. IEEE Trans. Electron Devices 53(9), 2051–2061 (2006)

    Article  Google Scholar 

  27. Ou, J.: gm/ID based noise analysis for CMOS analog circuits. In: Proceedings of IEEE International Midwest Symposium on Circuits and Systems, pp. 1–4 (2011)

    Google Scholar 

  28. Song, S., et al.: A 430nW 64nV/VHz current-reuse telescopic amplifier for neural recording application. In: Proceedings of IEEE Biomedical Circuits and Systems Conference, pp. 322–325 (2013)

    Google Scholar 

  29. Zou, X., et al.: A 100-channel 1-mW implantable neural recording IC. IEEE Trans. Circuits Syst. I Regul. Pap. 60(10), 2584–2596 (2013)

    Article  Google Scholar 

  30. Lee, J., Rhew, H.-G., Kipke, D.R., Flynn, M.P.: A 64 channel programmable closed-loop neurostimulator with 8 channel neural amplifier and logarithmic ADC. IEEE J. Solid-State Circuits 45(9), 1935–1945 (2010)

    Article  Google Scholar 

  31. Abdelhalim, K., Genov, R.: CMOS DAC-sharing stimulator for neural recording and stimulation arrays. In: Proceedings of IEEE International Symposium on Circuits and Systems, pp. 1712–1715 (2011)

    Google Scholar 

  32. Bult, K., Geelen, G.: A fast-settling CMOS op amp for SC circuits with 90-dB DC gain. IEEE J. Solid-State Circuits 25(6), 1379–1384 (1990)

    Article  Google Scholar 

  33. Kobayashi, T., Nogami, K., Shirotori, T., Fujimoto, Y.: A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture. IEEE J. Solid-State Circuits 28(4), 523–527 (1993)

    Article  Google Scholar 

Download references

Acknowledgements

This research was supported in part by the European Union and the Dutch government as part of the CATRENE program under Heterogeneous INCEPTION project.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Amir Zjajo .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2015 Springer International Publishing Switzerland

About this paper

Cite this paper

Zjajo, A., Galuzzi, C., van Leuken, R. (2015). Low Power Programmable Gain Analog to Digital Converter for Integrated Neural Implant Front End. In: Fred, A., Gamboa, H., Elias, D. (eds) Biomedical Engineering Systems and Technologies. BIOSTEC 2015. Communications in Computer and Information Science, vol 574. Springer, Cham. https://doi.org/10.1007/978-3-319-27707-3_2

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-27707-3_2

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-27706-6

  • Online ISBN: 978-3-319-27707-3

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics