Abstract
Throughout the development of concurrent systems, complexity may easily grow exponentially yielding a very complex and error-prone process. By using formal languages like CSP we may simplify this task increasing the level of confidence on the resulting system. Unfortunately, such languages are not executable: the gap between the specification language and an executable program must be solved. In previous work, we presented a tool, csp2hc, that translates a considerable subset of CSP into Handel-C source code, which can itself be converted to produce files to program FPGAs. This subset restricts the use of data structures and CSP hiding. In this paper, we present an extension to csp2hc that includes sequences in the set of acceptable data structures and completely deals with the CSP hiding operator. Finally, we validate our extension by applying the translation approach to a industrial scale case study, the steam boiler.
M.V.M. Oliveira—Partially supported by INES and CNPq (grants 573964/2008-4 and 483329/2012-6) and Instituto Metrópole Digital.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
- 1.
- 2.
Experiment Environment: Dell Inspiron 3000; Windows 8.1 x64; Intel Core I5 2.2 GHz with 3 MB Cache; 8 GB DDR3 RAM.
- 3.
References
Burns, A., Wellings, A.: Concurrency in Ada, 2nd edn. Cambridge University Press, Cambridge (1997)
Arvind.: Bluespec: a language for hardware design, simulation, synthesis and verification invited talk. In: Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), p. 249. IEEE Computer Society, Washington, DC (2003)
Bauer, J.C.: Specification for a software program for a boiler water content monitor and control system. University of Waterloo, Institute of Risk Research (1993)
Breshears, C.: Art of Concurrency: A Thread Monkey’s Guide to Writing Parallel Applications. O’Reilly Media Inc., Sebastopol (2009)
Cavalcanti, A.L.C., Sampaio, A.C.A., Woodcock, J.C.P.: A refinement strategy for Circus. Formal Aspects Comput. 15(2–3), 146–181 (2003)
Freitas, A., Cavalcanti, A.: Automatic translation from Circus to Java. In: Misra, J., Nipkow, T., Sekerinski, E. (eds.) FM 2006. LNCS, vol. 4085, pp. 115–130. Springer, Heidelberg (2006)
Freitas, L.: Circus Example - Parsable Steam Boiler. Academia.edu (2006)
Gingras, A.R.: Dining philosophers revisited. SIGCSE Bull 22(3), 21–ff (1990)
Hall, A.: Seven myths of formal methods. IEEE Softw. 7(5), 11–19 (1990)
Hoare, C.A.R.: Communicating Sequential Processes. Prentice-Hall, Upper Saddle River (1985)
Hinchey, M.G., Jarvis, S.A.: Concurrent Systems: Formal Development in CSP. McGraw-Hill Inc., New York (1995)
McMillin, B., Arrowsmith, E.: CCSP-a formal system for distributed program debugging. In: Proceedings of the Software for Multiprocessors and Supercomputers, Theory, Practice, Experience, Moscow - Russia (1994)
Mentor Graphics. Handel-C Synthesis Methodology (2012)
Cavalcanti, A., Oliveira, M.: From Circus to JCSP. In: Davies, J., Schulte, W., Barnett, M. (eds.) ICFEM 2004. LNCS, vol. 3308, pp. 320–340. Springer, Heidelberg (2004)
De Medeiros Júnior, I.S., Woodcock, J., Oliveira, M.V.M.: A verified protocol to implement multi-way synchronisation and interleaving in CSP. In: Hierons, R.M., Merayo, M.G., Bravetti, M. (eds.) SEFM 2013. LNCS, vol. 8137, pp. 46–60. Springer, Heidelberg (2013)
Woodcock, J., Oliveira, M.: Automatic generation of verified concurrent hardware. In: Butler, M., Hinchey, M.G., Larrondo-Petrie, M.M. (eds.) ICFEM 2007. LNCS, vol. 4789, pp. 286–306. Springer, Heidelberg (2007)
Phillips, J.D., Stiles, G.S.: An automatic translation of CSP to Handel-C. In: East, I.R., Duce, D., Green, M., Martin, J.M.R., Welch, P.H., (eds) Communicating Process Architectures 2004, pp. 19–38 (2004)
Raju, V., Rong, L., Stiles, G.S.: Automatic conversion of CSP to CTJ, JCSP, and CCSP. In: Broenink, J.F., Hilderink, G.H., (eds) Communicating Process Architectures 2003, pp. 63–81 (2003)
Roscoe, A.W.: The Theory and Practice of Concurrency. Prentice-Hall, Prentice-Hall Series in Computer Science (1998)
Roscoe, A.W.: Understanding Concurrent Systems, 1st edn. Springer, New York (2010)
Schneider, S.: Concurrent and Real Time Systems: The CSP Approach. Wiley, New York (1999)
Boulgakov, A., Armstrong, P., Roscoe, A.W., Gibson-Robinson, T.: FDR3 — a modern refinement checker for CSP. In: Ábrahám, E., Havelund, K. (eds.) TACAS 2014 (ETAPS). LNCS, vol. 8413, pp. 187–201. Springer, Heidelberg (2014)
Welch, P.H.: Process oriented design for Java: concurrency for all. In: Arabnia, H.R. (ed) Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, pp. 51–57. CSREA Press (2000)
Woodcock, J.C.P., Davies, J.: Using Z-Specification, Refinement, and Proof. Prentice-Hall, Upper Saddle River (1996)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2016 Springer International Publishing Switzerland
About this paper
Cite this paper
Macário, F.J.S., Oliveira, M.V.M. (2016). Hard-Wiring CSP Hiding: Implementing Channel Abstraction to Generate Verified Concurrent Hardware. In: Cornélio, M., Roscoe, B. (eds) Formal Methods: Foundations and Applications. SBMF 2015. Lecture Notes in Computer Science(), vol 9526. Springer, Cham. https://doi.org/10.1007/978-3-319-29473-5_1
Download citation
DOI: https://doi.org/10.1007/978-3-319-29473-5_1
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-29472-8
Online ISBN: 978-3-319-29473-5
eBook Packages: Computer ScienceComputer Science (R0)