Abstract
Field-programmable gate arrays (FPGAs) offer several desirable characteristics, such as high speed and flexibility. These characteristics come at a cost, however, as high performance FPGAs use SRAM-based configuration memories that are susceptible to Single Event Upsets (SEUs). The conventional approach is to use some form of redundancy with a periodic scrubbing of the configuration memory, thus removing accumulated SEUs. In this paper we propose a novel approach to scrubbing FPGAs in real-time systems, by using diagnostic information based only on the primary outputs of the circuits, in the form of a coarse-grained DMR, and a specialized scrubbing mechanism to avoid missing real-time deadlines.
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Santos, L.P., Nazar, G.L., Carro, L. (2016). Low Cost Dynamic Scrubbing for Real-Time Systems. In: Bonato, V., Bouganis, C., Gorgon, M. (eds) Applied Reconfigurable Computing. ARC 2016. Lecture Notes in Computer Science(), vol 9625. Springer, Cham. https://doi.org/10.1007/978-3-319-30481-6_12
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DOI: https://doi.org/10.1007/978-3-319-30481-6_12
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