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Real-Time Audio Group Delay Correction with FFT Convolution on FPGA

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 9625))

Abstract

This paper describes the implementation of a digital hardware architecture for correcting the effect produced by group delay distortion on multiway loudspeakers. The correction is performed by a digital filter implemented in the form of an FFT convolution. The application imposes real-time execution on an embedded low-cost platform using a high-resolution audio format (stereo coded on 24 bits @ 96 kHz). The result is a pipelined streaming architecture composed of FFT-complex multiplication-iFFT performed on 32,768 samples using a floating-point representation. The filter computation is performed in 72 ms and the overall maximal audio latency is 169 ms running on a Cyclone V FPGA.

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References

  1. Fincham, L.R.: The subjective importance of uniform group delay at low frequencies. JAES 33(6), 436–439 (1985)

    Google Scholar 

  2. Leonardo: group delay distortion and correction solutions, white paper. Goldmund company

    Google Scholar 

  3. Parks, T.W., Burrus, C.S.: Digital Filter Design. Wiley-Interscience, New York (1987)

    MATH  Google Scholar 

  4. Nussbaumer, H.J.: Fast Fourier Transform and Convolution Algorithms. Springer, Heidelberg (2012)

    MATH  Google Scholar 

  5. High-Definition Multimedia Interface Specification, Version 1.3a

    Google Scholar 

  6. Leclère, J., Botteron, C., Farine, P.A.: Implementing super-efficient FFTs in Altera FPGAs, EE Times Programmable Logic Designline (2015)

    Google Scholar 

  7. Ozdil, O., BILGEM, UEKAE/ILTAREN, TUBITAK, Gebze, Turkey: Implementation of a FPGA-based overlap-add filter. In: 2012 20th Signal Processing and Communications Applications Conference (SIU) (2012)

    Google Scholar 

  8. Altera Corp: Cyclone V Device Datasheet, June 2015

    Google Scholar 

  9. Altera Corp: FFT IP Core User Guide, October 2015

    Google Scholar 

  10. Nordin, G., Milder, P.A., Hoe, J.C., Püschel, M.: Automatic generation of customized discrete Fourier transform IPs. In: Design Automation Conference (2005)

    Google Scholar 

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Acknowledgement

The research presented in this paper is initiated and supported by Goldmund Company, especially by Véronique Adam and Olivier Schmitt.

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Correspondence to Arthur Spierer .

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© 2016 Springer International Publishing Switzerland

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Spierer, A., Upegui, A. (2016). Real-Time Audio Group Delay Correction with FFT Convolution on FPGA. In: Bonato, V., Bouganis, C., Gorgon, M. (eds) Applied Reconfigurable Computing. ARC 2016. Lecture Notes in Computer Science(), vol 9625. Springer, Cham. https://doi.org/10.1007/978-3-319-30481-6_19

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  • DOI: https://doi.org/10.1007/978-3-319-30481-6_19

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-30480-9

  • Online ISBN: 978-3-319-30481-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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