Abstract
Performance of classification using Feed-Forward Backpropagation Neural Network (FFBPNN) on a reconfigurable hardware architecture is evaluated in this paper. The hardware architecture used for implementation of FFBPNN in this paper is a set of interconnected HyperCells which serve as reconfigurable data paths for the network. The architecture is easily scalable and able to implement networks with no limitation on their number of input and output dimensions. The performance of FFBPNN implemented on network of HCs using Xilinx Virtex 7 XC7V2000T as target FPGA is compared with software implementation and GPU implementation of FFBPNN. Results show speed up of 1.02X-3.49X over equivalent software implementation on Intel Core 2 Quad and 1.07X-6X over GPU (NVIDIA GTX650).
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Mohammadi, M., Ronge, R., Singapuram, S.S., Nandy, S.K. (2016). Performance Evaluation of Feed-Forward Backpropagation Neural Network for Classification on a Reconfigurable Hardware Architecture. In: Bonato, V., Bouganis, C., Gorgon, M. (eds) Applied Reconfigurable Computing. ARC 2016. Lecture Notes in Computer Science(), vol 9625. Springer, Cham. https://doi.org/10.1007/978-3-319-30481-6_25
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DOI: https://doi.org/10.1007/978-3-319-30481-6_25
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