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In-Circuit Assertions and Exceptions for Reconfigurable Hardware Design

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Part of the book series: NASA Monographs in Systems and Software Engineering ((NASA))

Abstract

We present an approach to enable run-time, in-circuit assertions and exceptions in reconfigurable hardware designs. Static, compile-time checking, including formal verification, can catch many errors before a reconfigurable design is implemented. However, many other errors cannot be caught by static approaches, including those due to run-time data. Our approach allows users to add run-time assertions and exceptions to a design, giving multiple ways to handle run-time errors. We also allow imprecise assertions and exceptions, so that the origin of a failed assertion or raised exception is blurred. Users can take advantage of exception imprecision to trade performance for accurate location of errors. Our work includes a high-level approach to adding assertions and exceptions to a design, a concrete implementation for Maxeler streaming designs, and an evaluation. Results show low overhead for supporting assertions and exceptions in hardware design targeting FPGAs. For example, the cost of including assertions lies between 5% in lookup tables and 15% in Block RAMs in addition to the area used by the original design, due to logic used to implement assertion conditions, and buffers used to store assertion results. Furthermore, imprecision gives immediate benefits and up to 48% speedup over precise exceptions.

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References

  1. IEEE standard for property specification language (PSL): IEEE Std 1850-2010 (Revision of IEEE Std 1850-2005), pp. 1–182 (2010)

    Google Scholar 

  2. Bustan, D., Korchemny, D., Seligman, E., Yang, J.: SystemVerilog assertions: past, present, and future SVA standardization experience. Des. Test Comput. IEEE 29(2), 23–31 (2012)

    Article  Google Scholar 

  3. Curreri, J., Stitt, G., George, A.D.: High-level synthesis of in-circuit assertions for verification, debugging, and timing analysis. Int. J. Reconfigurable Comput. 2011 (2011)

    Google Scholar 

  4. Hoare, C.A.R.: Hints on Programming Language Design. Stanford, CA, USA, Tech. Rep. STAN-CS-73-403 (1973)

    Google Scholar 

  5. Hung, E., Todman, T., Luk, W.: Transparent insertion of latency-oblivious logic onto FPGAs. In: 24th International Conference on Field Programmable Logic and Applications (FPL), 2014. IEEE, pp. 1–8 (2014)

    Google Scholar 

  6. Clarke, L.A., Rosenblum, D.S.: A historical perspective on runtime assertion checking in software development. SIGSOFT Softw. Eng. Notes 31(3), 25–37 (2006) [Online]. Available: http://doi.acm.org/10.1145/1127878.1127900

  7. Scott, M.: Programming Language Pragmatics, 3rd edn. Morgan Kaufman (2009)

    Google Scholar 

  8. IEEE standard for floating-point arithmetic. IEEE Std 754-2008, pp. 1–58 (2008)

    Google Scholar 

  9. Hennessy, J.L., Patterson, D.A.: Computer Architecture, Fourth Edition: A Quantitative Approach. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA (2006)

    MATH  Google Scholar 

  10. Hung, E., Wilton, S.J.E.: Towards simulator-like observability for FPGAs: a virtual overlay network for trace-buffers. In: FPGA ’13 (2013)

    Google Scholar 

  11. Graham, P., Nelson, B., Hutchings, B.: Instrumenting bitstreams for debugging FPGA circuits. In The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001. FCCM ’01, pp. 41–50 (2001)

    Google Scholar 

  12. Poulos, Z., Yang, Y.-S., Anderson, J., Veneris, A., Le, B.: Leveraging reconfigurability to raise productivity in FPGA functional debug. In: Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pp. 292–295 (2012)

    Google Scholar 

  13. Vasudevan, S: What is assertion-based verification? SIGDA E-News, 42(12) (2012)

    Google Scholar 

  14. Todman, T., Stilkerich, S., Luk, W.: Using statistical assertions to guide self-adaptive systems. Int. J. Reconfigurable Comput. 2014 (2014) [Online]. Available: http://dx.doi.org/10.1155/2014/724585

  15. Hoare, C.A.R.: An axiomatic basis for computer programming. Commun. ACM 12(10), 576–580 (1969)

    Article  MATH  Google Scholar 

  16. Floyd, R.W.: Assigning meaning to programs. In: Proceedings of the Symposium on Applied Maths, vol. 19. AMS, pp. 19–32 (1967)

    Google Scholar 

  17. Dijkstra, E.W.: A Discipline of Programming. Prentice-Hall (1976)

    Google Scholar 

  18. Hoare, C.A.R.: Assertions: a personal perspective. Ann. Hist. Comput. IEEE 25(2), 14–25 (2003)

    Article  MathSciNet  Google Scholar 

  19. Wang, D., Levitt, J.: Automatic assume guarantee analysis for assertion-based formal verification. In: Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific, vol. 1, pp. 561–566 (2005)

    Google Scholar 

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Acknowledgements

The support of UK Engineering and Physical Sciences Research Council (EP/I012036/1, EP/L00058X/1, EP/L016796/1 and EP/N031768/1), the European Union Horizon 2020 Research and Innovation Programme under grant agreement number 671653, the Maxeler University Programme, Altera, Intel and Xilinx is gratefully acknowledged.

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Correspondence to Tim Todman .

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Todman, T., Luk, W. (2017). In-Circuit Assertions and Exceptions for Reconfigurable Hardware Design. In: Hinchey, M., Bowen, J., Olderog, ER. (eds) Provably Correct Systems. NASA Monographs in Systems and Software Engineering. Springer, Cham. https://doi.org/10.1007/978-3-319-48628-4_11

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  • DOI: https://doi.org/10.1007/978-3-319-48628-4_11

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-48627-7

  • Online ISBN: 978-3-319-48628-4

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