Abstract
Stereovision is a way to reconstruct 3D information that is inspired from the basic mechanism of human eyes. When dealing with real-time stereo computation, the use of specialized hardware architecture becomes mandatory. Consequently, many research work dealt with the implementation of this process using FPGA platforms, each one with a particular emphasis. This paper describes a novel architecture that optimizes the memory size to be used in a pipelined, pixel clock synchronized, stereo vision system. Consequently, this last provides the disparity map in real-time. The resulting work is a tiny architecture capable of processing stereo video streams on-the-fly, without external memory storage for stereo pairs. This implementation is fully pipelined and covers the entire stereovision process. In addition, the hardware implementation of the Hamming distance as well as the index computation were enhanced. The design is generic as the disparity window, the image size, and the matching algorithm can be selected (Census or SAD). The hardware implementation shows better performance over previous studies.
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References
Banz, C., Hesselbarth, S., Flatt, H., Blume, H., Pirsch, P.: Real-time stereo vision system using semi-global matching disparity estimation: architecture and FPGA-implementation. In: International Conference on Embedded Computer Systems (SAMOS), pp. 93–101, July 2010
Tippetts, B., Lee, D.J., Lillywhite, K., Archibald, J.K.: Hardware-efficient design of real-time profile shape matching stereo vision algorithm on FPGA. Int. J. Reconfigurable Comput. 2014, Article No. 2 (2014)
Brown, M., Burschka, D., Hager, G.: Advances in computational stereo. IEEE Trans. Pattern Anal. Mach. Intell. 25(8), 993–1008 (2003)
Chang, N., Lin, T.M., Tsai, T.H., Tseng, Y.C., Chang, T.S.: Real-time DSP implementation on local stereo matching. In: 2007 IEEE International Conference on Multimedia and Expo, pp. 2090–2093, July 2007
Greisen, P., Heinzle, S., Gross, M., Burg, A.: An FPGA-based processing pipeline for high-definition stereo video. EURASIP J. Image Video Process. 2011(1), 18 (2011)
Hartley, R.I., Zisserman, A.: Multiple View Geometry in Computer Vision, 2nd edn. Cambridge University Press, Cambridge (2004). ISBN: 0521540518
Honegger, D., Oleynikova, H., Pollefeys, M.: Real-time and low latency embedded computer vision hardware based on a combination of FPGA and mobile CPU. In: IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS ), pp. 4930–4935, September 2014
Jin, M., Maruyama, T.: Fast and accurate stereo vision system on FPGA. ACM Trans. Reconfigurable Technol. Syst. 7(1), 3:1–3:24 (2014)
Jin, S., Cho, J., Pham, X.D., Lee, K.M., Park, S.K., Kim, M., Jeon, J.: FPGA design and implementation of a real-time stereo vision system. IEEE Trans. Circ. Syst. Video Technol. 20(1), 15–26 (2010)
Kalarot, R., Morris, J.: Comparison of FPGA and GPU implementations of real-time stereo vision. In: 2010 IEEE Computer Society Conference on Computer Vision and Pattern Recognition Workshops (CVPRW), pp. 9–15, June 2010
Kim, J.H., Park, C.O., Kim, J.H., Cho, J.D.: Hardware implementation for census 3D disparity map with dynamic search range estimation. In: Signal Processing Algorithms, Architectures, Arrangements, and Applications Conference Proceedings (SPA), pp. 1–4, September 2011
Kostavelis, I., Nalpantidis, L., Boukas, E., Rodrigalvarez, M.A., Stamoulias, I., Lentaris, G., Diamantopoulos, D., Siozios, K., Soudris, D., Gasteratos, A.: SPARTAN: developing a vision system for future autonomous space exploration robots. J. Field Robot. 31(1), 107–140 (2014)
Michailidis, G.T., Pajarola, R., Andreadis, I.: High performance stereo system for dense 3-D reconstruction. IEEE Trans. Circ. Syst. Video Technol. 24(6), 929–941 (2014)
Scharstein, D., Szeliski, R.: A taxonomy and evaluation of dense two-frame stereo correspondence algorithms. Int. J. Comput. Vis. 47(1–3), 7–42 (2002)
Shan, Y., Hao, Y., Wang, W., Wang, Y., Chen, X., Yang, H., Luk, W.: Hardware acceleration for an accurate stereo vision system using mini-census adaptive support region. ACM Trans. Embed. Comput. Syst. 13(4s), 132:1–132:24 (2014)
Szeliski, R.: Computer Vision: Algorithms and Applications. Texts in Computer Science, 1st edn. Springer, London (2011)
Ttofis, C., Kyrkou, C., Theocharides, T.: A hardware-efficient architecture for accurate real-time disparity map estimation. ACM Trans. Embed. Comput. Syst. 14(2), 36:1–36:26 (2015)
Wegner, P.: A technique for counting ones in a binary computer. Commun. ACM 3(5), 322, May 1960. http://doi.acm.org/10.1145/367236.367286
Werner, M., Stabernack, B., Riechert, C.: Hardware implementation of a full HD real-time disparity estimation algorithm. IEEE Trans. Consum. Electron. 60(1), 66–73 (2014)
Xiang, X., Zhang, M., Li, G., He, Y., Pan, Z.: Real-time stereo matching based on fast belief propagation. Mach. Vis. Appl. 23(6), 1219–1227 (2012)
Zinner, C., Humenberger, M., Ambrosch, K., Kubinger, W.: An optimized software-based implementation of a census-based stereo matching algorithm. In: Bebis, G., et al. (eds.) ISVC 2008, Part I. LNCS, vol. 5358, pp. 216–227. Springer, Heidelberg (2008)
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Masmoudi, M.B.M., Jerad, C., Attia, R. (2016). On-the-Fly Architecture Design and Implementation of a Real-Time Stereovision System. In: Blanc-Talon, J., Distante, C., Philips, W., Popescu, D., Scheunders, P. (eds) Advanced Concepts for Intelligent Vision Systems. ACIVS 2016. Lecture Notes in Computer Science(), vol 10016. Springer, Cham. https://doi.org/10.1007/978-3-319-48680-2_62
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