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Informatics in Control, Automation and Robotics pp 410–422Cite as

Mathematical Model for the Output Signal’s Energy of an Ideal DAC in the Presence of Clock Jitter

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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 430))

Abstract

A mathematical model for the output signal’s energy of a multidimensional ideal DAC is presented considering sampling clock jitter. More specifically, a new model is formulated to prove one-sided energy inequality for the output signal, for which the base time is affected by the jitter. Moreover, a family of annihilate operators is defined and applied to the ideal (one-dimensional) DAC model to estimate the output signal energy.

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Author information

Authors and Affiliations

  1. Department of Basic and Applied Sciences for Engineering, Sapienza University of Rome, Via Antonio Scarpa n. 16, 00161, Rome, Italy

    Paola Loreti & Sima Sarv Ahrabi

  2. Department of Economics, Roma Tre University, via Silvio D’Amico 77, 00145, Rome, Italy

    Pierluigi Vellucci

Authors
  1. Paola Loreti
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  2. Sima Sarv Ahrabi
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  3. Pierluigi Vellucci
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Corresponding author

Correspondence to Pierluigi Vellucci .

Editor information

Editors and Affiliations

  1. Images, Signals, and Intelligent Systems Laboratory, University Paris-EST Créteil (UPEC), Créteil, France

    Kurosh Madani

  2. MAC Team, LAAS-CNRS, Toulouse Cedex 4, France

    Dimitri Peaucelle

  3. Ford Research and Advanced Engineering, Dearborn, Michigan, USA

    Oleg Gusikhin

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Loreti, P., Ahrabi, S.S., Vellucci, P. (2018). Mathematical Model for the Output Signal’s Energy of an Ideal DAC in the Presence of Clock Jitter . In: Madani, K., Peaucelle, D., Gusikhin, O. (eds) Informatics in Control, Automation and Robotics . Lecture Notes in Electrical Engineering, vol 430. Springer, Cham. https://doi.org/10.1007/978-3-319-55011-4_20

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  • DOI: https://doi.org/10.1007/978-3-319-55011-4_20

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-55010-7

  • Online ISBN: 978-3-319-55011-4

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