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Multi-precision Squaring for Public-Key Cryptography on Embedded Microprocessors, a Step Forward

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Book cover Information Security Applications (WISA 2016)

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Abstract

Multi-precision squaring is one of the most performance-critical operations for implementations of public-key cryptography, e.g. RSA, ECC as well as Diffie-Hellman key exchange protocols. In this paper, we propose novel techniques to push the speed limits of multi-precision squaring on embedded processors. The method reduces the number of memory access operations and improves the previous Sliding Block Doubling method by 4.1% on 8-bit RISC processor.

This work was partly supported by Institute for Information & communications Technology Promotion (IITP) grant funded by the Korea government (MSIP) (No. 10043907, Development of high performance IoT device and Open Platform with Intelligent Software) and partly supported by the MSIP (Ministry of Science, ICT and Future Planning), Korea, under the ITRC (Information Technology Research Center) support program (IITP-2016-H8501-16-1017) supervised by the IITP (Institute for Information & communications Technology Promotion).

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Notes

  1. 1.

    Pseudo code of sliding middle block doubling is available in Appendix A, and the triangle form in 160-bit is depicted in Fig. 6 in Appendix B.

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Correspondence to Howon Kim .

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Appendices

A Appendix: Pseudo Code: Sliding Middle Block Doubling

figure a

B Appendix: Triangle Form for SMBD Squaring

Fig. 6.
figure 6

Sliding middle block doubling where \(p=12\) in 160-bit (Color figure online)

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Seo, H. et al. (2017). Multi-precision Squaring for Public-Key Cryptography on Embedded Microprocessors, a Step Forward. In: Choi, D., Guilley, S. (eds) Information Security Applications. WISA 2016. Lecture Notes in Computer Science(), vol 10144. Springer, Cham. https://doi.org/10.1007/978-3-319-56549-1_28

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  • DOI: https://doi.org/10.1007/978-3-319-56549-1_28

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