Abstract
The Clock Constraint Specification Language (CCSL), first introduced as a companion language for Modeling and Analysis of Real-Time and Embedded systems (MARTE), has now evolved beyond the time specification of MARTE, and has become a full-fledged domain specific modeling language widely used in many domains. This paper shows the clock model, for infinite clock, interpreted over natural number domain based on instant as well as state. The differences and the relations between the two representations are discussed. A state-transition system and its abstract form is proposed in order to analyze CCSL specification’s features, such as potential deadlock, inconsistencies caused by introducing new constraints, and periodicity of admissible behavior. Finally, we examine some interesting features on a simple application by improving specification step by step.
This work is supported by the Natural Science Foundation of China (Grant No. 61572306, 61502294).
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We don’t allow such a schedule σ that ∀i > 0, c ∉ σ(i) to avoid to check the inconsistence caused by c ≺ c or c # c because here σ is over \( {\mathcal{C}} \) including c.
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Xu, Q., Miao, H., de Simone, R., DeAntoni, J. (2017). Instant-Based and State-Based Analysis of Infinite Logical Clock. In: Liu, S., Duan, Z., Tian, C., Nagoya, F. (eds) Structured Object-Oriented Formal Language and Method. SOFL+MSVL 2016. Lecture Notes in Computer Science(), vol 10189. Springer, Cham. https://doi.org/10.1007/978-3-319-57708-1_3
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