Skip to main content

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 723))

  • 3591 Accesses

Abstract

Nowadays multicores design become more complex, where they integrate different components on a single chip. Multithreading aims to increase utilization of a single core and decrease execution time. This research paper proposed adaptive scheduling in Multi2Sim framework to improve the performance of multicore-multithreaded processors. The performance evaluation of the adaptive scheduling shows minimizing execution time and maximize utilization compared types of scheduling in Multi2Sim framework.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 349.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 449.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. AMD Athlon\(^\text{TM}\) 64 X2 Dual-Core Processor Product Data Sheet, September 2006. www.amd.com

  2. McNairy, M., Rohit Bhatia, R.B., Montecito, M.: A dual-core, dual-thread Itanium processor. IEEE Micro 25(2), 10–20 (2005)

    Article  Google Scholar 

  3. Kalla, R., Sinharoy, B., Tendler, J.M.: IBM Power5 chip: a dual-core multithreaded processor. IEEE Micro 25(2), 40–47 (2005)

    Google Scholar 

  4. Shirazi, B.A., Kavi, K.M., Hurson, A.R.: Scheduling and Load Balancing in Parallel and Distributed Systems. IEEE Computer Society Press, Los Alamitos (1995)

    Google Scholar 

  5. Casavant, T.L., Kuhl, J.G.: A taxonomy of scheduling in general-purpose distributed computing systems. IEEE Trans. Softw. Eng. 14(2), 141–154 (1988)

    Article  Google Scholar 

  6. Ubal, R., Jang, B., Mistry, P., Schaa, D., Kaeli, D.: Multi2Sim: a simulation framework for CPU-GPU computing. In: Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques, pp. 335–344. ACM (2012)

    Google Scholar 

  7. Ubal, R., Sahuquillo, J., Petit, S., Lopez, P.: Multi2sim: a simulation framework to evaluate multicore-multithread processors. In: IEEE 19th International Symposium on Computer Architecture and High Performance computing, pp. 62–68. Citeseer (2007)

    Google Scholar 

  8. Burger, D.C., Austin, T.M.: The simple scalar tool set, Version 2.0. Technical report CS-TR-1997-1342 (1997)

    Google Scholar 

  9. Tullsen, D.M.: Simulation and modeling of a simultaneous multithreading processor. In: 22nd Annual Computer Measurement Group Conference, December 1996

    Google Scholar 

  10. Moudgill, M., Bose, P., Moreno, J.: Validation of Turandot, a fast processor model for microarchitecture exploration. In: IEEE International Performance, Computing, and Communications Conference (1999)

    Google Scholar 

  11. Moudgill, M., Wellman, J., Moreno, J.: Environment for power PC microarchitecture exploration. IEEE Micro 19(3), 15–25 (1999)

    Article  Google Scholar 

  12. Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hallberg, G., Hogberg, J., Larsson, F., Moestedt, A., Werner, B.: Simics: a full system simulation platform. IEEE Comput. 35(2), 50–58 (2002)

    Article  Google Scholar 

  13. Marty, M.R., Beckmann, B., Yen, L., Alameldeen, A.R., Xu, M., Moore, K.: GEMS: multifacets general execution-driven multiprocessor simulator. In: International Symposium on Computer Architecture (2006)

    Google Scholar 

  14. Binkert, N.L., Hallnor, E.G., Reinhardt, S.K.: Network-oriented full-system simulation using M5. In: 6th Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW), Ref. 107, February 2003

    Google Scholar 

  15. Ubal, R., Sahuquillo, J., Petit, S., Lopez, P.: A simulation framework to evaluate multicore-multithreaded processors. In: Proceedings of the 19th International Symposium on Computer Architecture and High Performance Computing, Gramado, Brazil, October 2007

    Google Scholar 

  16. Zhao, X., Ma, S., Chen, W., Wang, Z.: Exploiting parallelism in the simulation of general purpose graphics processing unit program. J. Shanghai Jiaotong Univ. (Science) 21(3), 280–288 (2016)

    Article  Google Scholar 

  17. Gong, X., Ubal, R., Kaeli, D.: Multi2Sim Kepler: a detailed architectural GPU simulator. In: IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pp. 269–278. IEEE (2017)

    Google Scholar 

  18. The Multi2Sim Simulation Framework. http://www.multi2sim.org

  19. MiBench Benchmark. http://vhosts.eecs.umich.edu/mibench

  20. SPEC CPU Benchmarks. http://www.spec.org/benchmarks.html

Download references

Author information

Authors and Affiliations

Authors

Corresponding authors

Correspondence to Shahira Mahmoud or Mohamed Saleh .

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2018 Springer International Publishing AG

About this paper

Check for updates. Verify currency and authenticity via CrossMark

Cite this paper

Nour, S., Mahmoud, S., Saleh, M. (2018). Adaptive Task Scheduling on Multicore Processors. In: Hassanien, A., Tolba, M., Elhoseny, M., Mostafa, M. (eds) The International Conference on Advanced Machine Learning Technologies and Applications (AMLTA2018). AMLTA 2018. Advances in Intelligent Systems and Computing, vol 723. Springer, Cham. https://doi.org/10.1007/978-3-319-74690-6_56

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-74690-6_56

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-74689-0

  • Online ISBN: 978-3-319-74690-6

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics