Abstract
5G heterogeneity will cover a huge diversity of use cases, ranging from enhanced-broadband to low-throughput and low-power communications. To address such requirements variety, this paper proposes a parallel-pipelined architecture for an OFDM baseband modulator with clock frequency run-time adaptation through dynamic frequency scaling (DFS). It supports a set of OFDM numerologies recently proposed for 5G communication systems. The parallel-pipelined architecture can achieve high throughputs at low clock frequencies (up to 520.3 MSamples/s at 160 MHz) and DFS allows for the adjustment of baseband processing clock frequency according to immediate throughput demands. The application of DFS increases the system’s power efficiency by allowing power savings up to 62.5%; the resource and latency overhead is negligible.
This work is financed by the ERDF - European Regional Development Fund through the Operational Programme for Competitiveness and Internationalisation - COMPETE 2020 Programme within project POCI-01-0145-FEDER-006961, by National Funds through the FCT - Fundação para a Ciência e a Tecnologia (Portuguese Foundation for Science and Technology), through the Ph.D. Grant PD/BD/105860/2014 and the Supplementary Training Grant CRM:0067654.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsReferences
Andrews, J., Buzzi, S., Choi, W., Hanly, S., Lozano, A., Soong, A., Zhang, J.: What will 5G be? IEEE J. Sel. Areas Commun. 32(6), 1065–1082 (2014)
Cooley, J.W., Tukey, J.W.: An algorithm for the machine calculation of complex Fourier series. Math. Comput. 19(90), 297–301 (1965). http://www.jstor.org/stable/2003354
ETSI: 5 GHz RLAN; Harmonised Standard covering the essential requirements of article 3.2 of Directive 2014/53/EU. Technical report, Draft ETSI EN 301 893 v2.1.1, ETSI, May 2017. http://www.etsi.org/standards
Ferreira, M.L., Barahimi, A., Ferreira, J.C.: Dynamically reconfigurable LTE-compliant OFDM modulator for downlink transmission. In: 2016 Conference on Design of Circuits and Integrated Systems, November 2016
Garrido, M., Grajal, J., Sanchez, M.A., Gustafsson, O.: Pipelined radix-\(2^{k}\) feedforward FFT architectures. IEEE Trans. Very Large Scale Integr. Syst. 21(1), 23–32 (2013)
He, K., Crockett, L., Stewart, R.: Dynamic reconfiguration technologies based on FPGA in software defined radio system. J. Sig. Process. Syst. 69(1), 75–85 (2011)
He, S., Torkelson, M.: A new approach to pipeline FFT processor. In: Proceedings of IPPS 1996, The 10th International Parallel Processing Symposium, April 1996
Huang, L., Wang, Y., Shi, Z., Wen, R.: Radio parameter design for OFDM-based millimeter-wave systems. In: 2016 IEEE 27th Annual International Symposium on Personal, Indoor, and Mobile Radio Communications, September 2016
Lin, S.J., Chung, W.H.: The split-radix fast Fourier transforms with radix-4 butterfly units. In: 2013 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, October 2013
Luo, F., Zhang, C.: Signal Processing for 5G: Algorithms and Implementations. Wiley - IEEE, Indianapolis (2016)
Meyer, J., Dreschmann, M., Karnick, D., Schindler, P.C., Freude, W., Leuthold, J., Becker, J.: A novel system on chip for software-defined, high-speed OFDM signal processing. In: 26th Symposium on Integrated Circuits and Systems Design, September 2013
Meyer-Baese, U.: Digital Signal Processing with Field Programmable Gate Arrays. Springer, Heidelberg (2004). https://doi.org/10.1007/978-3-540-72613-5
Moy, C., Palicot, J.: Software radio: a catalyst for wireless innovation. IEEE Commun. Mag. 53(9), 24–30 (2015)
Nokia: White Paper - The 5G mmWave revolution. Technical report. SR1610000323EN, Nokia Corporation (2016). https://resources.ext.nokia.com/asset/200779
Pecot, M.: Enabling High-Speed Radio Designs with Xilinx All Programmable FPGAs and SoCs. Technical report. WP445, Xilinx Inc., January 2014. v1.0
Tatsukawa, J.: XAPP888 - MMCM and PLL Dynamic Reconfiguration. Xilinx Inc., v1.7
Xilinx Inc.: UG585 - Zynq-7000 Technical Reference Manual, v1.11
Xilinx Inc.: UG954 - ZC706 Evaluation Board for the Zynq-7000 XC7Z045 All Programmable SoC User Guide, v1.6
Zaidi, A.A., Baldemair, R., Tullberg, H., Bjorkegren, H., Sundstrom, L., Medbo, J., Kilinc, C., Silva, I.D.: Waveform and numerology to support 5G services and requirements. IEEE Commun. Mag. 54(11), 90–98 (2016)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2018 Springer International Publishing AG, part of Springer Nature
About this paper
Cite this paper
Ferreira, M.L., Ferreira, J.C., Huebner, M. (2018). A Parallel-Pipelined OFDM Baseband Modulator with Dynamic Frequency Scaling for 5G Systems. In: Voros, N., Huebner, M., Keramidas, G., Goehringer, D., Antonopoulos, C., Diniz, P. (eds) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2018. Lecture Notes in Computer Science(), vol 10824. Springer, Cham. https://doi.org/10.1007/978-3-319-78890-6_41
Download citation
DOI: https://doi.org/10.1007/978-3-319-78890-6_41
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-78889-0
Online ISBN: 978-3-319-78890-6
eBook Packages: Computer ScienceComputer Science (R0)