Abstract
The paper presents a BDD-based post-synthesis technique to detect the redundant gates in a reversible circuit. Given a reversible circuit C, we are looking for a maximal (or most costly) subset of gates in C that can be removed from C without altering the functionality of the circuit. The runtime of the new algorithm is linear in the size of the involved binary decision diagrams (BDD). In order to lower the runtimes, the presented approach is extended to handle the restricted problem of only looking for up to k gates that can be removed from C for some constant k. This restriction should ensure that the sizes of the involved BDDs remain practicable for adequate constants k.
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- 1.
The results presented in this paper have been worked out in the master thesis [13] of the first author who has been supervised by the second and third author.
- 2.
For a formal definition, please see Sect. 3.
- 3.
We can apply any cost metric in which the costs of a reversible circuit are given by the sum of the costs of the single reversible gates contained in it. For the sake of simplicity, in this paper we take the size of the redundant gate combination as cost metric.
- 4.
Remember that in this paper we defined global optimization problem as the problem of finding the most costly redundant gate combination of a given reversible circuit. In general, this will not lead to an optimal reversible circuit of the respective reversible Boolean function.
- 5.
The remaining 128 circuits could not be checked because of too high requirements for computing time or out of main memory.
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Pfuhl, M., Ritter, J., Molitor, P. (2018). Finding the Redundant Gates in Reversible Circuits. In: Kari, J., Ulidowski, I. (eds) Reversible Computation. RC 2018. Lecture Notes in Computer Science(), vol 11106. Springer, Cham. https://doi.org/10.1007/978-3-319-99498-7_14
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