Abstract
This article investigates microcode generation, finalization and loading in MOLEN ρμ processors. In addition, general solutions for these issues are presented and implementation for Xilinx Virtex-II Pro platform FPGA is introduced.
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© 2004 Springer-Verlag Berlin Heidelberg
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Kuzmanov, G., Gaydadjiev, G., Vassiliadis, S. (2004). Loading ρμ-Code: Design Considerations. In: Pimentel, A.D., Vassiliadis, S. (eds) Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2004. Lecture Notes in Computer Science, vol 3133. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-27776-7_2
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DOI: https://doi.org/10.1007/978-3-540-27776-7_2
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-22377-1
Online ISBN: 978-3-540-27776-7
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