Abstract
A novel configuration bitstream generation tool for a custom FPGA platform is presented. It can support a variety of devices of similar architecture. The tool exhibits technology independence and is easily modifiable. The tool also allows partial reconfiguration as long as the target platform also does.
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References
Tatas, K., et al.: FPGA Architecture Design and Toolset for Logic Implementation. In: Chico, J.J., Macii, E. (eds.) PATMOS 2003. LNCS, vol. 2799, pp. 607–616. Springer, Heidelberg (2003)
Kalenteridis, V., et al.: An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development. Accepted for publication in RAW 2004, Santa Fe, New Mexico, USA, April 26-27 (2004)
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Siozios, K., Koutroumpezis, G., Tatas, K., Soudris, D., Thanailakis, A. (2004). A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_142
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DOI: https://doi.org/10.1007/978-3-540-30117-2_142
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-22989-6
Online ISBN: 978-3-540-30117-2
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