Abstract
This paper presents a new data representation known as Dual FiXed-point (DFX), which employs a single bit exponent to select two different fixed-point scalings. DFX provides a compromise between conventional fixed-point and floating-point representations. It has the implementation complexity similar to that of a fixed-point system together with the improved dynamic range offered by a floating-point system. The benefit of using DFX over both fixed-point and floating-point is demonstrated with an IIR filter implementation on a Xilinx Virtex II FPGA.
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© 2004 Springer-Verlag Berlin Heidelberg
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Te Ewe, C., Cheung, P.Y.K., Constantinides, G.A. (2004). Dual Fixed-Point: An Efficient Alternative to Floating-Point Computation. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_22
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DOI: https://doi.org/10.1007/978-3-540-30117-2_22
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-22989-6
Online ISBN: 978-3-540-30117-2
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