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An Evolvable Hardware Tutorial

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Field Programmable Logic and Application (FPL 2004)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3203))

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Abstract

Evolvable Hardware (EHW) is a scheme – inspired by natural evolution, for automatic design of hardware systems. By exploring a large design search space, EHW may find solutions for a task, unsolvable, or more optimal than those found using traditional design methods. During evolution it is necessary to evaluate a large number of different circuits which is normally most efficiently undertaken in reconfigurable hardware. For digital design, FPGAs (Field Programmable Gate Arrays) are very applicable. Thus, this technology is applied in much of the work with evolvable hardware. The paper introduces EHW and outlines how it can be applied for hardware design of real-world applications. It continues by discussing the main problems and possible solutions. This includes improving the scalability of evolved systems. Promising features of EHW will be addressed as well, including run-time adaptable systems.

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References

  1. Cantu-Paz, E.: A survey of parallel genetic algorithms. Calculateurs Paralleles, Reseaux et Systems Repartis 10(2), 141–171 (1998)

    Google Scholar 

  2. Darwen, P., Yao, X.: Automatic modularization by speciation. In: Proc. of 1996 IEEE International Conference on Evolutionary Computation, pp. 88–93 (1996)

    Google Scholar 

  3. Goldberg, D.: Genetic Algorithms in search, optimization, and machine learning. Addison-Wesley, Reading (1989)

    MATH  Google Scholar 

  4. Higuchi, T., et al.: Evolvable hardware: A first step towards building a Darwin machine. In: Proc. of the 2nd International Conference on Simulated Behaviour, pp. 417–424. MIT Press, Cambridge (1993)

    Google Scholar 

  5. Higuchi, T., Iwata, M., Kajitani, I., Iba, H., Hirao, Y., Manderick, B., Furuya, T.: Evolvable hardware and its applications to pattern recognition and fault-tolerant systems. In: Sanchez, E., Tomassini, M. (eds.) Towards Evolvable Hardware 1995. LNCS, vol. 1062, pp. 118–135. Springer, Heidelberg (1996)

    Google Scholar 

  6. Hillis, W.D.: Co-evolving parasites improve simulated evolution as an optimization procedure. Physica D 42(1-3), 228–234 (1990)

    Article  Google Scholar 

  7. Iwata, M., Kajitani, I., Yamada, H., Iba, H., Higuchi, T.: A pattern recognition system using evolvable hardware. In: Ebeling, W., Rechenberg, I., Voigt, H.-M., Schwefel, H.-P. (eds.) PPSN 1996. LNCS, vol. 1141, pp. 761–770. Springer, Heidelberg (1996)

    Chapter  Google Scholar 

  8. De Jong, K.A., Potter, M.A.: Evolving complex structures via co-operative coevolution. In: Proc. of Fourth Annual Conference on Evolutionary Programming, pp. 307–317. MIT Press, Cambridge (1995)

    Google Scholar 

  9. Kajitani, I., Hoshino, T., Kajihara, N., Iwata, M., Higuchi, T.: An evolvable hardware chip and its application as a multi-function prosthetic hand controller. In: Proc. of 16th National Conference on Artificial Intelligence (AAAI 1999), pp. 182–187 (1999)

    Google Scholar 

  10. Keymeulen, D., et al.: On-line model-based learning using evolvable hardware for a robotics tracking systems. In: Genetic Programming 1998: Proc. of the Third Annual Conference, pp. 816–823. Morgan Kaufmann, San Francisco (1998)

    Google Scholar 

  11. Koza, J.R.: Genetic Programming II: Automatic Discovery of Reusable Programs. The MIT Press, Cambridge (1994)

    MATH  Google Scholar 

  12. Koza, J.R., et al.: Genetic Programming III. Morgan Kaufmann Publishers, San Francisco (1999)

    MATH  Google Scholar 

  13. Koza, J.R., et al.: The importance of reuse and development in evolvable hardware. In: Lohn, J., et al. (eds.) Proc. of the 2003 NASA/DoD Conference on Evolvable Hardware, pp. 33–42. IEEE, Los Alamitos (2003)

    Chapter  Google Scholar 

  14. Lee, W.-P., Hallam, J., Lund, H.H.: Learning complex robot behaviours by evolutionary computing with task decomposition. In: Birk, A., Demiris, J. (eds.) EWLR 1997. LNCS (LNAI), vol. 1545, pp. 155–172. Springer, Heidelberg (1998)

    Chapter  Google Scholar 

  15. Lohn, J.D., Colombano, S.P.: A circuit representation technique for automated circuit design. IEEE Trans. on Evolutionary Computation 3(3), 205–219 (1999)

    Article  Google Scholar 

  16. Miller, J.F.: Digital filter design at gate-level using evolutionary algorithms. In: Banzhaf, W., et al. (eds.) Proc. of the Genetic and Evolutionary Computation Conference (GECCO 1999), pp. 1127–1134. Morgan Kaufmann, San Francisco (1999)

    Google Scholar 

  17. Murakawa, M., et al.: Analogue EHW chip for intermediate frequency filters. In: Sipper, M., et al. (eds.) ICES 1998. LNCS, vol. 1478, pp. 134–143. Springer, Heidelberg (1998)

    Chapter  Google Scholar 

  18. Murakawa, M., et al.: The grd chip: Genetic reconfiguration of dsps for neural network processing. IEEE Transactions on Computers 48(6), 628–638 (1999)

    Article  Google Scholar 

  19. Murakawa, M., Yoshizawa, S., Kajitani, I., Furuya, T., Iwata, M., Higuchi, T.: Hardware evolution at function level. In Proc. of Parallel Problem Solving from Nature IV (PPSN IV). In: Ebeling, W., Rechenberg, I., Voigt, H.-M., Schwefel, H.-P. (eds.) PPSN 1996. LNCS, vol. 1141, pp. 62–71. Springer, Heidelberg (1996)

    Chapter  Google Scholar 

  20. Porter, R., et al.: An applications approach to evolvable hardware. In: Proc. of the First NASA/DoD Workshop on Evolvable Hardware (1999)

    Google Scholar 

  21. Potter, M.A., De Jong, K.A.: Evolving neural networks with collaborative species. In: Proc. of Summer Computer Simulation Conference. The Society for Computer Simulation (1995)

    Google Scholar 

  22. Sakanashi, et al.: Evolvable hardware chip for high precision printer image compression. In: Proc. of 15th National Conference on Artificial Intelligence, AAAI 1998 (1998)

    Google Scholar 

  23. Sekanina, L.: Toward uniform approach to design of evolvable hardware based systems. In: Hartenstein, R.W., et al. (eds.) FPL 2000. LNCS, vol. 1896, pp. 814–817. Springer, Heidelberg (2000)

    Chapter  Google Scholar 

  24. Sekanina, L.: Evolvable Components: From theory to Hardware Implementations. Springer, Heidelberg (2004) ISBN 3-540-40377-9

    MATH  Google Scholar 

  25. Sekanina, L., Ruzicka, R.: Design of the special fast reconfigurable chip using common F PGA. In: Proc. of Design and Diagnostics of Electronic Circuits and Sy stems - IEEE DDECS 2000, pp. 161–168 (2000)

    Google Scholar 

  26. Sipper, M., Mange, D.: Special issue on from biology to hardware and back. IEEE Trans. on Evolutionary Computation 3(3), 165–250 (1999)

    Article  Google Scholar 

  27. Takahashi, E., et al.: An evolvable-hardware-based clock timing architecture towards gigahz digital systems. In: Proc. of the Genetic and Evolutionary Computation Conference (1999)

    Google Scholar 

  28. Thompson, A.: Exploration in design space: Unconventional electronics design through artificial evolution. IEEE Trans. on Evolutionary Computation 3(3), 171–177 (1999)

    Article  Google Scholar 

  29. Torresen, J.: Exploring knowledge schemes for efficient evolution of hardware. In: Proc. of the 2004 NASA/DoD Conference on Evolvable Hardware (2004)

    Google Scholar 

  30. Torresen, J.: A divide-and-conquer approach to evolvable hardware. In: Sipper, M., et al. (eds.) ICES 1998. LNCS, vol. 1478, pp. 57–65. Springer, Heidelberg (1998)

    Chapter  Google Scholar 

  31. Torresen, J.: Increased complexity evolution applied to evolvable hardware. In: Dagli, et al. (eds.) Smart Engineering System Design: Neural Networks, Fuzzy Logic, Evolutionary Programming, Data Mining, and Complex Systems, Proc. of ANNIE 1999, November 1999, pp. 429–436. ASME Press (1999)

    Google Scholar 

  32. Torresen, J.: Possibilities and limitations of applying evolvable hardware to real-world application. In: Hartenstein, R.W., et al. (eds.) FPL 2000. LNCS, vol. 1896, pp. 230–239. Springer, Heidelberg (2000)

    Chapter  Google Scholar 

  33. Torresen, J.: Scalable evolvable hardware applied to road image recognition. In: Lohn, J., et al. (eds.) Proc. of the 2nd NASA/DoDWorkshop on Evolvable Hardware, July 2000, pp. 245–252. IEEE Computer Society, Silicon Valley (2000)

    Chapter  Google Scholar 

  34. Torresen, J., Vinger, K.A.: High performance computing by context switching reconfigurable logic. In: Proc. of the 16th European Simulation Multiconference (ESM 2002), SCS Europe, pp. 207–210 (June 2002)

    Google Scholar 

  35. Torresen, J.: A scalable approach to evolvable hardware. Journal of Genetic Programming and Evolvable Machines 3(3), 259–282 (2002)

    Article  MATH  Google Scholar 

  36. Yao, X.: Following the path of evolvable hardware. Communications of the ACM 42(4), 47–79 (1999)

    Article  Google Scholar 

  37. Yao, X., Higuchi, T.: Promises and challenges of evolvable hardware. In: Higuchi, T., et al. (eds.) ICES 1996. LNCS, vol. 1259, pp. 55–78. Springer, Heidelberg (1997)

    Google Scholar 

  38. Yasunaga, M., et al.: Evolvable sonar spectrum discrimination chip designed by genetic algorithm. In: Proc. of 1999 IEEE Systems, Man, and Cybernetics Conference, SMC 1999 (1999)

    Google Scholar 

  39. Yasunaga, M., et al.: Gene finding using evolvable reasoning hardware. In: Hadddow, P., Tyrrel, A., Torresen, J. (eds.) ICES 2003. LNCS, vol. 2606, pp. 228–237. Springer, Heidelberg (2003)

    Chapter  Google Scholar 

  40. Zebulum, R., et al.: Evolutionary Electronics: Automatic Design of Electronic Circuits and Systems by Genetic Algorithms. CRC Press, Boca Raton (2001) ISBN 0849308658

    Book  Google Scholar 

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Author information

Authors and Affiliations

  1. Department of Informatics, University of Oslo, P.O. Box 1080, N-0316, Blindern, Oslo, Norway

    Jim Torresen

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  1. Jim Torresen
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Editor information

Editors and Affiliations

  1. ITIV - Universitaet Karlsruhe (TH),  

    Jürgen Becker

  2. University of Paderborn,  

    Marco Platzner

  3. IMEC, Kapeldreef 75, Leuven, Leuven, Belgium

    Serge Vernalde

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© 2004 Springer-Verlag Berlin Heidelberg

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Torresen, J. (2004). An Evolvable Hardware Tutorial. In: Becker, J., Platzner, M., Vernalde, S. (eds) Field Programmable Logic and Application. FPL 2004. Lecture Notes in Computer Science, vol 3203. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30117-2_83

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  • DOI: https://doi.org/10.1007/978-3-540-30117-2_83

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-22989-6

  • Online ISBN: 978-3-540-30117-2

  • eBook Packages: Springer Book Archive

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