Abstract
Railway diagram disorder caused by various reasons is a serious problem in our everyday life, and expected to be recovered as soon as possible. In order to assist the quick recovery of disordered railway diagram, we are planning to provide a railway diagram recovery system, which is based on an annotated logic program called EVALP (Extended Vector Annotated Logic Program) with temporal reasoning. In this paper, we introduce a railway diagram simulation system based on EVALP based safety verification for interlocking. We also introduce the ideas of the railway interlocking safety verification and railway signal control based on EVALPSN.
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References
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Nakamatsu, K., Kiuchi, Y., Suzuki, A. (2004). EVALPSN Based Railway Interlocking Simulator. In: Negoita, M.G., Howlett, R.J., Jain, L.C. (eds) Knowledge-Based Intelligent Information and Engineering Systems. KES 2004. Lecture Notes in Computer Science(), vol 3214. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30133-2_127
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DOI: https://doi.org/10.1007/978-3-540-30133-2_127
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