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Exploiting Symmetries for Testing Equivalence in the Spi Calculus

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Automated Technology for Verification and Analysis (ATVA 2004)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3299))

Abstract

Testing equivalence is a quite powerful way of expressing security properties of cryptographic protocols, but its formal verification is a difficult task, because it is based on the universal quantification over contexts. A technique based on state exploration to address this verification problem has been previously presented; it relies on an environment-sensitive labelled transition system (ES-LTS) and on symbolic term representation. This paper shows that such a technique can be enhanced by exploiting symmetries found in the ES-LTS structure. Experimental results show that the proposed enhancement can substantially reduce the size of the ES-LTS and that the technique as a whole compares favorably with respect to related work.

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Cibrario B., I., Durante, L., Sisto, R., Valenzano, A. (2004). Exploiting Symmetries for Testing Equivalence in the Spi Calculus. In: Wang, F. (eds) Automated Technology for Verification and Analysis. ATVA 2004. Lecture Notes in Computer Science, vol 3299. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30476-0_15

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  • DOI: https://doi.org/10.1007/978-3-540-30476-0_15

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-23610-8

  • Online ISBN: 978-3-540-30476-0

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