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International Conference on Parallel and Distributed Computing: Applications and Technologies

PDCAT 2004: Parallel and Distributed Computing: Applications and Technologies pp 787–790Cite as

The Analysis of Hardware Supported Cache Lock Mechanism Without Retry

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3320))

Abstract

A lock mechanism is essential for synchronization on the multiprocessor systems. This paper proposes the new locking protocol, called WPV (Waiting Processor Variable) lock mechanism. It uses the cache state lock mechanism and has only one lock-read bus traffic. This paper also derives the analytical model of WPV lock mechanism as well as conventional memory and cache queuing lock mechanisms. The simulation results on the WPV lock mechanism show that access time is reduced comparing with the memory and queuing lock mechanism as the number of processors increases.

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References

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Author information

Authors and Affiliations

  1. Dept. of Digital Contents, College of Electronics and Information Engineering, Sejong University, Seoul, Korea

    Wonil Kim

  2. Software School, Sangmyung University, Seoul, Korea

    Chuleui Hong & Yeongjoon Kim

Authors
  1. Wonil Kim
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  2. Chuleui Hong
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  3. Yeongjoon Kim
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Editor information

Editors and Affiliations

  1. Nanyang Centre for Supercomputing and Visualisation School of Mechanical and Production Engineering, Nanyang Technological University, 50 Nanyang Avenue, 639 798, Singapore

    Kim-Meow Liew

  2. School of Computer Science, The University of Adelaide,  

    Hong Shen

  3. Asia Pacific Science and Technology Center, Sun Microsystems Inc., 50 Nanyang Avenue, N3-1c-10, 639798, Singapore

    Simon See

  4. School of Computer Engineering, Nanyang Technological University, 639798, Singapore

    Wentong Cai

  5. Southwest Jiaotong University,  

    Pingzhi Fan

  6. Tohoku University ,  

    Susumu Horiguchi

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© 2004 Springer-Verlag Berlin Heidelberg

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Cite this paper

Kim, W., Hong, C., Kim, Y. (2004). The Analysis of Hardware Supported Cache Lock Mechanism Without Retry. In: Liew, KM., Shen, H., See, S., Cai, W., Fan, P., Horiguchi, S. (eds) Parallel and Distributed Computing: Applications and Technologies. PDCAT 2004. Lecture Notes in Computer Science, vol 3320. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30501-9_154

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  • DOI: https://doi.org/10.1007/978-3-540-30501-9_154

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-24013-6

  • Online ISBN: 978-3-540-30501-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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