Hierarchies of DLOGTIME-Uniform Circuits

Abstract

We present complexity hierarchies on circuits under two DLOGTIME-uniformity conditions. It is shown that there is a language which can be recognized by a family of $U_{\mbox{\tiny E}}$-uniform circuits of depth $d(1+\epsilon)(\log n)^{r_1}$ and size $n^{r_2(1+\epsilon)}$ but not by any family of $U_{\mbox{\tiny E}}$-uniform circuits of depth $d(\log n)^{r_1}$ and size $n^{r_2}$, where ε> 0, d>0, r ₁>1, and r ₂≥1 are arbitrary rational constants. It is also shown that there is a language which can be recognized by a family of $U_{\mbox{\tiny D}}$-uniform circuits of depth (1+o(1))t(n)log z(n) and size (16t(n)+ψ(n)(log z(n))²)(z(n))² but not by any family of $U_{\mbox{\tiny D}}$-uniform circuits of depth t(n) and size z(n), where ψ(n) is an arbitrary slowly growing function not bounded by O(1).