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Performance Improvement of Hardware-Based Packet Classification Algorithm

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Networking - ICN 2005 (ICN 2005)

Part of the book series: Lecture Notes in Computer Science ((LNCCN,volume 3421))

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Abstract

Packet classification is important in fulfilling the requirements of differentiated services in next generation networks. In the previous work, we presented an efficient hardware scheme, Condensate Bit Vector, based on bit vectors. The scheme significantly improves the scalability of packet classification. In this work, the characteristics of Condensate Bit Vector are further illustrated, and two drawbacks that may negatively affect the performance of Condensate Bit Vector are revealed. We show the solution to resolve the weaknesses and introduce the new schemes, Condensate Ordered Bit Vector and Condensate and Aggregate Ordered Bit Vector. Experiments show that our new algorithms drastically improve the search speed as compared to the original algorithm.

This work is supported in part by the National Science Council under Grant No. NSC93-2752-E-009-006-PAE.

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Chen, YC., Wang, PC., Lee, CL., Chan, CT. (2005). Performance Improvement of Hardware-Based Packet Classification Algorithm. In: Lorenz, P., Dini, P. (eds) Networking - ICN 2005. ICN 2005. Lecture Notes in Computer Science, vol 3421. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-31957-3_82

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  • DOI: https://doi.org/10.1007/978-3-540-31957-3_82

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-25338-9

  • Online ISBN: 978-3-540-31957-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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