Abstract
A methodology for memory optimization in wavelet-based coders is presented. The dynamic memory requirements of the ASAP forward Wavelet Transform (WT) in three different output data grouping modes are studied: (a) independent output blocks with dyadically decreasing sizes; (b) zero-tree blocks and (c) independent equally-sized blocks. We propose an optimal approach of data clustering and calculation scheduling aiming at minimal memory requirements. This goal is reached using an appropriate subdivision of the filter inputs and it is verified with the assistance of an automatic design tool. The importance of the data dependencies between the different functional modules is shown to be dominant.
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Ferentinos, V., Milia, M., Lafruit, G., Bormans, J., Catthoor, F. (2003). Memory Compaction and Power Optimization for Wavelet-Based Coders. In: Chico, J.J., Macii, E. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2003. Lecture Notes in Computer Science, vol 2799. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39762-5_39
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DOI: https://doi.org/10.1007/978-3-540-39762-5_39
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-20074-1
Online ISBN: 978-3-540-39762-5
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