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Synthesizing on a Reconfigurable Chip an Autonomous Robot Image Processing System

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Field Programmable Logic and Application (FPL 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2778))

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Abstract

This paper deals with the implementation, in a high density reconfigurable device, of an entire log-polar image processing system. The log-polar vision reduces the amount of data to be stored and processed, simplifying several vision algorithms and making it possible the implementation of a complete processing system on a single chip. This image processing system is specially appropriated for autonomous robotic navigation, since these platforms have typically power consumption, size and weight restrictions. Furthermore, the image processing algorithms involved are time consuming and many times they have also real-time restrictions. A reconfigurable approach on a single chip combines hardware performance and software flexibility and appears as specially suited to autonomous robotic navigation. The implementation of log-polar image processing algorithms as a pipeline of differential processing stages is a feasible approach, since the chip incorporates RAM memory enough for storing several full log-polar images as intermediate computations. Two different algorithms have been synthesized into the reconfigurable device showing the chip capabilities.

This work has been supported by the Generalitat Valenciana under project CTIDIA/2002/142

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Boluda, J.A., Pardo, F. (2003). Synthesizing on a Reconfigurable Chip an Autonomous Robot Image Processing System. In: Y. K. Cheung, P., Constantinides, G.A. (eds) Field Programmable Logic and Application. FPL 2003. Lecture Notes in Computer Science, vol 2778. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-45234-8_45

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  • DOI: https://doi.org/10.1007/978-3-540-45234-8_45

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